公开(公告)号：US20220037235A1

公开(公告)日：2022-02-03

申请号：US17185166

申请日：2021-02-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hakseung LEE ,  Kwangjin MOON ,  Hyungjun JEON ,  Hyoukyung CHO

IPC: H01L23/48 ,  H01L23/522 ,  H01L23/528 ,  H01L23/00

Abstract: A semiconductor device may include a substrate including a first surface and a second surface, which are opposite to each other, an insulating layer on the first surface of the substrate, a first via structure and a second via structure penetrating the substrate and a portion of the insulating layer and having different widths from each other in a direction parallel to the first surface of the substrate, metal lines provided in the insulating layer, and an integrated circuit provided on the first surface of the substrate. A bottom surface of the first via structure may be located at a level lower than a bottom surface of the second via structure, when measured from the first surface of the substrate. The second via structure may be electrically connected to the integrated circuit through the metal lines.

公开(公告)号：US20220223555A1

公开(公告)日：2022-07-14

申请号：US17709856

申请日：2022-03-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyungjun JEON ,  Kwangjin MOON ,  Hakseung LEE ,  Hyoukyung CHO

IPC: H01L23/00 ,  H01L25/065 ,  H01L21/683 ,  H01L21/78 ,  H01L25/00

Abstract: A semiconductor stack and a method for manufacturing the same are disclosed. The semiconductor stack includes a lower chip, an upper chip disposed over the lower chip, an upper lateral-side passivation layer surrounding side surfaces of the upper chip, and a plurality of bonding pads and a bonding passivation layer disposed between the upper chip and the lower chip.

公开(公告)号：US20220367321A1

公开(公告)日：2022-11-17

申请号：US17713421

申请日：2022-04-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyungjun JEON ,  Kwangjin MOON ,  Myungjoo PARK ,  Hakseung LEE ,  Sonkwan HWANG

IPC: H01L23/48 ,  H01L23/528 ,  H01L23/522 ,  H01L23/00

Abstract: A semiconductor device includes front and back side structures on first and second surfaces of a substrate, respectively, and first and second through electrodes penetrating the substrate. The front side structure includes a circuit device, a first front side conductive pattern at a first level, a second front side conductive pattern at a second level, a lower insulating structure, and first to third insulating structures. The back side structure includes a first and a second back side conductive pattern on the same level. The first through electrode contacts the first back side conductive pattern and the first front side conductive pattern. The second through electrode contacts the second back side conductive pattern and the second front side conductive pattern. The first front side conductive pattern penetrates the second insulating structure and at least a portion of the third insulating structure.

公开(公告)号：US20220336327A1

公开(公告)日：2022-10-20

申请号：US17808533

申请日：2022-06-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： EUNJI KIM ,  Sungdong CHO ,  Kwangwuk PARK ,  Sangjun PARK ,  Daesuk LEE ,  Hakseung LEE

IPC: H01L23/48 ,  H01L25/18 ,  H01L21/768

Abstract: A semiconductor device includes a semiconductor substrate having an active surface on which semiconductor elements are provided. An interlayer insulating film is provided on the semiconductor substrate. A first via structure passes through the semiconductor substrate. The first via structure has a first diameter. A second via structure passes through the semiconductor substrate. The second via structure has a second diameter that is greater than the first diameter. The first via structure has a step portion that is in contact with the interlayer insulating film.

公开(公告)号：US20210305186A1

公开(公告)日：2021-09-30

申请号：US17035215

申请日：2020-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyungjun JEON ,  Kwangjin MOON ,  Hakseung LEE ,  Hyoukyung CHO

IPC: H01L23/00 ,  H01L25/065 ,  H01L21/683 ,  H01L21/78 ,  H01L25/00

Abstract: A semiconductor stack and a method for manufacturing the same are disclosed. The semiconductor stack includes a lower chip, an upper chip disposed over the lower chip, an upper lateral-side passivation layer surrounding side surfaces of the upper chip, and a plurality of bonding pads and a bonding passivation layer disposed between the upper chip and the lower chip.

公开(公告)号：US20200066682A1

公开(公告)日：2020-02-27

申请号：US16408891

申请日：2019-05-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taeseong KIM ,  Kwangjin MOON ,  Hyoju KIM ,  Junhong MIN ,  Hakseung LEE

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L21/768

Abstract: Disclosed are semiconductor packages and methods of manufacturing the same. The semiconductor package comprises a substrate, a first unit structure attached to the substrate, and a second unit structure attached to the first unit structure. Each of the first and second unit structures comprises an adhesive layer, a lower semiconductor chip on the adhesive layer, an upper semiconductor chip on and in contact with the lower semiconductor chip, and a plurality of vias penetrating the upper semiconductor chip and connecting with the lower and upper semiconductor chips.