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公开(公告)号:US20240135543A1
公开(公告)日:2024-04-25
申请号:US18479441
申请日:2023-10-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Fang LIU , Fengtao XIE , Fangfang DU , Ke LU , Pengfei ZHAO
IPC: G06T7/11 , G06V10/764
CPC classification number: G06T7/11 , G06V10/764
Abstract: A method and an electronic device with image data generating are disclosed. The electronic device includes: one or more processors; and memory storing instructions configured to cause the one or more processors to: input an input image to a target model that performs segmenting on the input image to generate a segmented image whose pixels have respective class labels predicted by the target model, calculate an optimization value for the input image based on the segmented image and based on a class label of a first grid area among a plurality of grid areas of a guide image, and optimize the input image based on the optimization value.
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公开(公告)号:US20240411597A1
公开(公告)日:2024-12-12
申请号:US18734233
申请日:2024-06-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: Fengtao XIE , Tian LIU , Yueyang LI , Biao XING , Byungwoo BANG , Junyeon LEE
Abstract: A device for managing a virtual memory is disclosed. The device includes: a host processor configured to, in response to a memory request from an accelerator, allocate to the accelerator, from among virtual address spaces, a virtual address of first virtual address subspaces reserved for the accelerator; and a host processor allocation device configured to, in response to a memory request from a host processor, allocate to the host processor, from among the virtual address spaces, a virtual address of second virtual address subspaces that are exclusive of the first virtual address subspaces.
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公开(公告)号:US20220027710A1
公开(公告)日:2022-01-27
申请号:US17376302
申请日:2021-07-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Fengtao XIE , Fangfang DU , Fang LIU , Liang LI , Pengfei ZHAO , Ke LU
Abstract: A method and apparatus for determining a neural network architecture of a processor are provided. The method of determining a target neural network architecture, the method comprising obtaining a first neural network architecture, searching for the first neural network architecture based on a loss function, in response to a first search end condition not being satisfied, and determining a target neural network architecture used in a processor, based on a result of the searching, wherein the loss function is based on a processor computation cost.
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公开(公告)号:US20230093407A1
公开(公告)日:2023-03-23
申请号:US17946218
申请日:2022-09-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Fangfang DU , Fang LIU , Liang LI , Pengfei ZHAO , Fengtao XIE
Abstract: A method and apparatus with neural network optimization are provided. A method is performed by a device storing a target network block and processing hardware that performs optimizing for the target network block, the method includes generating, by the processing hardware, an extended network block of the target network block by increasing, a number of channels of a target operation branch in the target network block to a determined number of channels, wherein the target network block includes operation branches that include the target operation branch, and wherein each operation branch includes at least one respective channel, determining importance measures of the respective operation branches, including the target operation branch with the increased number of channels, in the extended network block, and clipping a channel of the target operation branch in the extended network block, the clipping is performed according to the importance measures of the respective operation branches.
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公开(公告)号:US20210034950A1
公开(公告)日:2021-02-04
申请号:US16983520
申请日:2020-08-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Fengtao XIE , Ke LU
IPC: G06N3/04
Abstract: A method and apparatus for implementing a neural network model in a heterogeneous computing platform are disclosed. The method includes partitioning a neural network model into first sub-models based on a partition standard, obtaining second sub-models by merging at least a portion of the first sub-models based on characteristics of the first sub-models, and deploying the second sub-models.
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公开(公告)号:US20240233132A9
公开(公告)日:2024-07-11
申请号:US18479441
申请日:2023-10-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Fang LIU , Fengtao XIE , Fangfang DU , Ke LU , Pengfei ZHAO
IPC: G06T7/11 , G06V10/764
CPC classification number: G06T7/11 , G06V10/764
Abstract: A method and an electronic device with image data generating are disclosed. The electronic device includes: one or more processors; and memory storing instructions configured to cause the one or more processors to: input an input image to a target model that performs segmenting on the input image to generate a segmented image whose pixels have respective class labels predicted by the target model, calculate an optimization value for the input image based on the segmented image and based on a class label of a first grid area among a plurality of grid areas of a guide image, and optimize the input image based on the optimization value.
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公开(公告)号:US20240220340A1
公开(公告)日:2024-07-04
申请号:US18475683
申请日:2023-09-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Fengtao XIE , Huiru DENG , Lu WEI , Biao XING
IPC: G06F9/54
CPC classification number: G06F9/542
Abstract: A method and apparatus for adjusting a checkpoint are provided. The method includes monitoring calls of an application program interface (API) that are called when an accelerator device executes an application, and by the monitoring, checking an API execution logic and a current API execution cycle of the application with respect to the accelerator device; and determining a next checkpoint according to a checkpoint adjustment strategy that determines the next checkpoint based on the API execution logic and based on the current API execution cycle of the application, wherein the checkpoint adjustment strategy corresponds to at least one API execution logic among plural API execution logics.
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