公开(公告)号：US20240250689A1

公开(公告)日：2024-07-25

申请号：US18494340

申请日：2023-10-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongmin KO ,  Jaewoo PARK ,  Myoungbo KWAK ,  Jueon KIM ,  Junghwan CHOI

IPC: H03M1/06

CPC classification number: H03M1/0604

Abstract: An analog-to-digital conversion circuit includes an analog-to-digital converter (ADC) configured to receive an input signal and a first clock signal from an external source and to output a second clock signal and a digital output signal, a decision counter configured to increment a decision count value each time when the second clock signal received from the analog-to-digital converter is applied to the decision counter, a voltage control logic configured to output a control signal based on a result of comparing the decision count value with a reference count value, and a regulator configured to output an operation voltage, wherein the ADC is configured to adjust the cycle of the second clock signal, and the voltage control logic is configured to control the regulator to output a corrected operating voltage via the control signal.