公开(公告)号：US20240324206A1

公开(公告)日：2024-09-26

申请号：US18581174

申请日：2024-02-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byungik YOO ,  Seungbeom KO ,  Taemok GWON ,  Changjin SON ,  Chadong YEO ,  Seulji LEE ,  Seungmin LEE

IPC: H10B43/27 ,  H10B41/27 ,  H10B41/41 ,  H10B43/40

CPC classification number: H10B43/27 ,  H10B41/27 ,  H10B41/41 ,  H10B43/40

Abstract: A nonvolatile memory device includes a substrate including a memory cell region and a connection region; a mold structure including a plurality of gate electrodes and a plurality of mold insulating layers alternately stacked; a channel structure passing through the mold structure in the memory cell region; a first cell contact passing through the mold structure in the connection region, connected to a first gate electrode and electrically disconnected from a second gate electrode; a plurality of support structures surrounding the first cell contact planarly in the connection region and extending through the mold structure; and a dam structure located between the first cell contact and the second gate electrode in the connection region and apart from the first cell contact with an insulating ring therebetween.