公开(公告)号：US12293090B2

公开(公告)日：2025-05-06

申请号：US17939949

申请日：2022-09-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Vincent Tung Pham ,  Andrew Zhenwen Chang

IPC: G06F3/00 ,  G06F3/06

Abstract: A storage device is disclosed. The storage device may include a storage for a data and a controller to manage access to the data in the storage. A mechanism may automatically manage a bias mode for a chunk of the data in the storage, the bias mode including one of a host bias mode and a device bias mode.

公开(公告)号：US20200097210A1

公开(公告)日：2020-03-26

申请号：US16195732

申请日：2018-11-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Andrew Zhenwen Chang ,  Jongmin Gim ,  Hongzhong Zheng

IPC: G06F3/06 ,  G06F21/62

Abstract: A database offloading engine. In some embodiments, the database offloading engine includes a vectorized adder including a plurality of read-modify-write circuits, a plurality of sum buffers respectively connected to the read-modify-write circuits, a key address table, and a control circuit. The control circuit may be configured to receive a first key and a corresponding first value; to search the key address table for the first key; and, in response to finding, in the key address table, an address corresponding to the first key, to route the address and the first value to a read-modify-write circuit, of the plurality of read-modify-write circuits, corresponding to the address.

公开(公告)号：US11836133B2

公开(公告)日：2023-12-05

申请号：US17515379

申请日：2021-10-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Andrew Zhenwen Chang ,  Vincent Tung Pham ,  Jaemin Jung

IPC: G06F12/0882 ,  G06F16/248 ,  G06F16/2453 ,  G06F16/2455

CPC classification number: G06F16/24539 ,  G06F12/0882 ,  G06F16/248 ,  G06F16/24532 ,  G06F16/24552

Abstract: An accelerator is disclosed. The accelerator may include an on-chip memory to store a data from a database. The on-chip memory may include a first memory bank and a second memory bank. The first memory bank may store the data, which may include a first value and a second value. A computational engine may execute, in parallel, a command on the first value in the data and the command on the second value in the data in the on-chip memory. The on-chip memory may be configured to load a second data from the database into the second memory bank in parallel with the computation engine executing the command on the first value in the data and executing the command on the second value in the data.

公开(公告)号：US11334284B2

公开(公告)日：2022-05-17

申请号：US16195732

申请日：2018-11-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Andrew Zhenwen Chang ,  Jongmin Gim ,  Hongzhong Zheng

IPC: G06F3/06 ,  G06F21/62

Abstract: A database offloading engine. In some embodiments, the database offloading engine includes a vectorized adder including a plurality of read-modify-write circuits, a plurality of sum buffers respectively connected to the read-modify-write circuits, a key address table, and a control circuit. The control circuit may be configured to receive a first key and a corresponding first value; to search the key address table for the first key; and, in response to finding, in the key address table, an address corresponding to the first key, to route the address and the first value to a read-modify-write circuit, of the plurality of read-modify-write circuits, corresponding to the address.