Efficient phase calibration methods and systems for serial interfaces

    公开(公告)号:US11695538B2

    公开(公告)日:2023-07-04

    申请号:US17586442

    申请日:2022-01-27

    CPC classification number: H04L7/02 H03L7/0814 H04B17/12 H04B17/21

    Abstract: A phase calibration method includes sweeping phase codes applicable to a serial clock signal, identifying a first, a second, a third, and a fourth phase code, wherein the first phase code causes zero plus a first threshold number of bits extracted from the serial data signal to be a particular value, wherein the second phase code causes all minus a second threshold number of bits extracted from the serial data signal to be the particular value, wherein the third phase code causes all minus a third threshold number of bits extracted from the serial data signal to be the particular value, wherein the fourth phase code causes zero plus a fourth threshold number of bits extracted from the serial data signal to be the particular value, determining an average phase code based on the identified phase codes.

    Efficient phase calibration methods and systems for serial interfaces

    公开(公告)号:US11239992B1

    公开(公告)日:2022-02-01

    申请号:US17211758

    申请日:2021-03-24

    Abstract: A phase calibration method includes sweeping phase codes applicable to a serial clock signal, identifying a first, a second, a third, and a fourth phase code, wherein the first phase code causes zero plus a first threshold number of bits extracted from the serial data signal to be a particular value, wherein the second phase code causes all minus a second threshold number of bits extracted from the serial data signal to be the particular value, wherein the third phase code causes all minus a third threshold number of bits extracted from the serial data signal to be the particular value, wherein the fourth phase code causes zero plus a fourth threshold number of bits extracted from the serial data signal to be the particular value, determining an average phase code based on the identified phase codes.

    Word alignment using deserializer pattern detection

    公开(公告)号:US10778357B2

    公开(公告)日:2020-09-15

    申请号:US16275193

    申请日:2019-02-13

    Abstract: A system for word alignment. In some embodiments, the system includes a deserializer circuit, an alignment detection circuit, and a clock generator circuit. The clock generator circuit has a plurality of enable outputs connected to a plurality of enable inputs of the deserializer circuit, and a plurality of clock outputs connected to a plurality of clock inputs of the deserializer circuit. The alignment detection circuit is configured to detect a coarse word alignment; and, in response to detecting the coarse word alignment, to cause a reset of the clock generator circuit.

    WORD ALIGNMENT USING DESERIALIZER PATTERN DETECTION

    公开(公告)号:US20200136736A1

    公开(公告)日:2020-04-30

    申请号:US16275193

    申请日:2019-02-13

    Abstract: A system for word alignment. In some embodiments, the system includes a deserializer circuit, an alignment detection circuit, and a clock generator circuit. The clock generator circuit has a plurality of enable outputs connected to a plurality of enable inputs of the deserializer circuit, and a plurality of clock outputs connected to a plurality of clock inputs of the deserializer circuit. The alignment detection circuit is configured to detect a coarse word alignment; and, in response to detecting the coarse word alignment, to cause a reset of the clock generator circuit.

    EFFICIENT PHASE CALIBRATION METHODS AND SYSTEMS FOR SERIAL INTERFACES

    公开(公告)号:US20220224505A1

    公开(公告)日:2022-07-14

    申请号:US17586442

    申请日:2022-01-27

    Abstract: A phase calibration method includes sweeping phase codes applicable to a serial clock signal, identifying a first, a second, a third, and a fourth phase code, wherein the first phase code causes zero plus a first threshold number of bits extracted from the serial data signal to be a particular value, wherein the second phase code causes all minus a second threshold number of bits extracted from the serial data signal to be the particular value, wherein the third phase code causes all minus a third threshold number of bits extracted from the serial data signal to be the particular value, wherein the fourth phase code causes zero plus a fourth threshold number of bits extracted from the serial data signal to be the particular value, determining an average phase code based on the identified phase codes.

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