EMISSION CONTROL DRIVER
    1.
    发明申请

    公开(公告)号:US20240420641A1

    公开(公告)日:2024-12-19

    申请号:US18815757

    申请日:2024-08-26

    Abstract: A driver includes a stage that includes a first controller, a second controller, and a first output unit. The first controller controls a voltage level of a first node. The second controller controls voltage levels of a second node and a third node to be equal to the voltage level of a first node or an opposite voltage level of the voltage level of the first node, and controls a voltage level of a fifth node to be equal to the opposite voltage level of the voltage level of the first node. The first output unit may output a gate control signal, which has a first voltage when the second node and the third node is in an on-voltage level state, and has a second voltage when the fifth node is in an on-voltage level state.

    Display panel having power bus line with reduced voltage drop

    公开(公告)号:US11430858B2

    公开(公告)日:2022-08-30

    申请号:US16294306

    申请日:2019-03-06

    Abstract: A display panel includes a substrate including a first non-display area surrounding a transmission area, a display area on an outer portion of the first non-display area, and a second non-display area surrounding the display area, driving thin film transistors and display elements in the display area, a first power supply line in the second non-display area and extending in a first direction, first driving voltage lines and second driving voltage lines extending in a second direction intersecting with the first direction and spaced apart from each other with the transmission area therebetween, and a power bus line connected to the second driving voltage lines in the first non-display area or second non-display area, the power bus line extending in the first direction. A length of the power bus line in the first direction is less than a length of the first power supply line in the first direction.

    Emission driver, display apparatus including the same and method of driving display apparatus

    公开(公告)号:US12039939B2

    公开(公告)日:2024-07-16

    申请号:US18111197

    申请日:2023-02-17

    CPC classification number: G09G3/3291 G09G2310/08 G09G2330/04

    Abstract: An emission driver includes a plurality of stages. A stage of the plurality of stages receives a start signal, a first clock signal, a second clock signal, a protection signal, a first gate power voltage and a second gate power voltage and outputs an emission signal. The stage of the plurality of stages includes a pull-up switching element connected between a first gate power voltage terminal which receives the first gate power voltage and an emission signal output terminal which outputs the emission signal, a pull-down switching element connected between a second gate power voltage terminal which receives the second gate power voltage and the emission signal output terminal and a protection switching element which applies the first gate power voltage to a control electrode of the pull-down switching element in response to the protection signal.

    Display apparatus having a notch
    7.
    发明授权

    公开(公告)号:US11238794B2

    公开(公告)日:2022-02-01

    申请号:US17012798

    申请日:2020-09-04

    Abstract: A display apparatus includes a substrate which includes a first pixel area and a second pixel area. A third pixel area is spaced apart from the second pixel area. A notch peripheral area is adjacent to the first, second and third pixel areas. A plurality of pixels are provided in the first, second and third pixel areas. A first scan line is disposed on the substrate. The first scan line includes a first portion disposed in the second pixel area, a second portion disposed in the third pixel area, and a third portion which connects the first portion to the second portion. The third portion is disposed in the notch peripheral area. A second scan line is disposed on the substrate in the first pixel area. A surface area of the first scan line is from about 90% to about 110% of a surface area of the second scan line.

    Display apparatus having a notch
    8.
    发明授权

    公开(公告)号:US10769994B2

    公开(公告)日:2020-09-08

    申请号:US16260775

    申请日:2019-01-29

    Abstract: A display apparatus includes a substrate which includes a first pixel area and a second pixel area. A third pixel area is spaced apart from the second pixel area. A notch peripheral area is adjacent to the first, second and third pixel areas. A plurality of pixels are provided in the first, second and third pixel areas. A first scan line is disposed on the substrate. The first scan line includes a first portion disposed in the second pixel area, a second portion disposed in the third pixel area, and a third portion which connects the first portion to the second portion. The third portion is disposed in the notch peripheral area. A second scan line is disposed on the substrate in the first pixel area. A surface area of the first scan line is from about 90% to about 110% of a surface area of the second scan line.

    GATE DRIVER AND DISPLAY APPARATUS INCLUDING SAME

    公开(公告)号:US20240412697A1

    公开(公告)日:2024-12-12

    申请号:US18813017

    申请日:2024-08-23

    Abstract: Provided is a gate driver including a plurality of stages, wherein each stage includes an output unit including a pull-up transistor and a pull-down transistor, and a second node controller configured to control a voltage of a second control node to which a gate of the pull-up transistor is connected, wherein the second node controller includes a first control transistor connected between the first clock terminal and the second control node and including a gate connected to the first control node, and a second control transistor including a gate connected to the gate of the first control transistor and configured to control a short circuit between the first clock terminal and a second clock terminal.

    Scan driver
    10.
    发明授权

    公开(公告)号:US11922886B2

    公开(公告)日:2024-03-05

    申请号:US18137348

    申请日:2023-04-20

    CPC classification number: G09G3/3266

    Abstract: According to an embodiment, a scan driver includes a plurality of stages. An output controller of each of the stages includes a pull-down transistor, and the pull-down transistor includes a first gate and a second gate, where the first gate is electrically connected to a third control node or a node electrically connected to the third control node, and the second gate is connected to a third voltage input terminal to which a third voltage of a second voltage level is applied.

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