公开(公告)号：US20190392778A1

公开(公告)日：2019-12-26

申请号：US16401088

申请日：2019-05-01

Applicant: Samsung Display Co., Ltd.

Inventor： Ki Hyun PYUN ,  Jong Young YUN

IPC: G09G3/36 ,  G09G3/3275

Abstract: An interface system may include a transmitter and a receiver, which are coupled to each other through transmission lines, wherein the transmitter includes a transmission controller configured to transmit a reset signal to the receiver, wherein the receiver includes a reset unit configured to reset input common mode voltages of the transmission lines, based on the reset signal, and wherein the transmission lines include a first transmission line for transmitting a signal having a first phase, and a second transmission line for transmitting a signal having a second phase that is different from the first phase.

公开(公告)号：US20200036288A1

公开(公告)日：2020-01-30

申请号：US16437572

申请日：2019-06-11

Applicant: Samsung Display Co., Ltd.

Inventor： Ki Hyun PYUN ,  Seung Woon SHIN ,  Jong Young YUN

IPC: H02M3/158 ,  H02M1/08 ,  H03K7/08

Abstract: A driving voltage provider includes: a PLL circuit for generating clock signals with different phases according to a divider value; a DC-DC converter for generating a PWM signal according to the frequency of a first clock signal, and providing a driving voltage based on the duty ratio of the PWM signal; a first tuning circuit for outputting a first tuning signal having a first logic level when the logic levels of first and second sampling signals obtained by sampling the PWM signal at transition times of different clock signals are different, and outputting the first tuning signal having a second logic level when the first and second sampling signals have the same logic level; and a divider value determiner for decreasing the divider value when the logic level of the first tuning signal is the first logic level.