TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20190341405A1

    公开(公告)日:2019-11-07

    申请号:US16516149

    申请日:2019-07-18

    Abstract: A transistor array panel includes a transistor which includes a gate electrode, a semiconductor layer on the gate electrode, and a source electrode and a drain electrode on the semiconductor layer. The semiconductor layer includes a first portion overlapping the source electrode, a second portion overlapping the drain electrode, and a third portion between the first portion and the second portion. The first portion, the second portion, and the third portion have different minimum thicknesses.

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