公开(公告)号：US09252158B2

公开(公告)日：2016-02-02

申请号：US14101604

申请日：2013-12-10

Applicant: Samsung Display Co., Ltd.

Inventor： Sung Hoon Yang ,  Hyeong Suk Yoo ,  Hae Yoon Jung ,  Jong-Chul Park ,  Jong Hyun Park ,  Jang-Ki Baek ,  Eun-Chan Lim

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1222 ,  H01L27/127 ,  H01L29/78696

Abstract: A thin film transistor array panel includes a first insulating substrate, a gate electrode positioned on the first insulating substrate, a gate insulating layer positioned on the gate electrode, a semiconductor layer positioned on the gate insulating layer, and a source electrode and a drain electrode positioned on the semiconductor layer and spaced apart from each other, in which the semiconductor layer includes three or more amorphous silicon layers having different bandgap energies from one another in order to reduce a leakage current and improve performance of a liquid crystal display.

Abstract translation: 薄膜晶体管阵列面板包括第一绝缘基板，位于第一绝缘基板上的栅电极，位于栅电极上的栅极绝缘层，位于栅极绝缘层上的半导体层，以及源电极和漏电极 位于半导体层上并且彼此间隔开，其中半导体层包括彼此具有不同带隙能量的三个或更多个非晶硅层，以便减少漏电流并提高液晶显示器的性能。

公开(公告)号：US20150008434A1

公开(公告)日：2015-01-08

申请号：US14101604

申请日：2013-12-10

Applicant: Samsung Display Co., Ltd.

Inventor： Sung Hoon Yang ,  Hyeong Suk Yoo ,  Hae Yoon Jung ,  Jong-Chul Park ,  Jong Hyun Park ,  Jang-Ki Baek ,  Eun-Chan Lim

IPC: H01L27/12

CPC classification number: H01L27/1222 ,  H01L27/127 ,  H01L29/78696

Abstract: A thin film transistor array panel includes a first insulating substrate, a gate electrode positioned on the first insulating substrate, a gate insulating layer positioned on the gate electrode, a semiconductor layer positioned on the gate insulating layer, and a source electrode and a drain electrode positioned on the semiconductor layer and spaced apart from each other, in which the semiconductor layer includes three or more amorphous silicon layers having different bandgap energies from one another in order to reduce a leakage current and improve performance of a liquid crystal display.

Abstract translation: 薄膜晶体管阵列面板包括第一绝缘基板，位于第一绝缘基板上的栅电极，位于栅电极上的栅极绝缘层，位于栅极绝缘层上的半导体层，以及源电极和漏电极 位于半导体层上并且彼此间隔开，其中半导体层包括彼此具有不同带隙能量的三个或更多个非晶硅层，以便减少漏电流并提高液晶显示器的性能。