System and method for controlling CDR and CTLE parameters

    公开(公告)号:US11204888B2

    公开(公告)日:2021-12-21

    申请号:US16848819

    申请日:2020-04-14

    Abstract: A circuit for receiving serial data. In some embodiments, the circuit has an input for receiving an analog input signal, and includes a first sampler for sampling the analog input signal relative to a first reference voltage, a second sampler for sampling the analog input signal relative to a second reference voltage, and a reference voltage control circuit. The second reference voltage may have a sign opposite to that of the first reference voltage; and the reference voltage control circuit may be configured to adjust the first reference voltage or the second reference voltage, based on a first sample of the analog input signal, the first sample having been taken at a sampling time corresponding to a one bit, in the serial data, preceded by a one bit and followed by a one bit.

    SYSTEM AND METHOD FOR CONTROLLING CDR AND CTLE PARAMETERS

    公开(公告)号:US20210248103A1

    公开(公告)日:2021-08-12

    申请号:US16848819

    申请日:2020-04-14

    Abstract: A circuit for receiving serial data. In some embodiments, the circuit has an input for receiving an analog input signal, and includes a first sampler for sampling the analog input signal relative to a first reference voltage, a second sampler for sampling the analog input signal relative to a second reference voltage, and a reference voltage control circuit. The second reference voltage may have a sign opposite to that of the first reference voltage; and the reference voltage control circuit may be configured to adjust the first reference voltage or the second reference voltage, based on a first sample of the analog input signal, the first sample having been taken at a sampling time corresponding to a one bit, in the serial data, preceded by a one bit and followed by a one bit.

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