公开(公告)号：US20250157898A1

公开(公告)日：2025-05-15

申请号：US18389257

申请日：2023-11-14

Applicant: STMicroelectronics International N.V.

Inventor： Venero SANTAMARIA

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31

Abstract: A leadframe includes first leads and second leads, wherein each lead of the first and second leads has an upper surface. First and second silver spots are provided on the upper surface of each lead of the first and second leads. An integrated circuit die has a front surface including first and second interconnection pads. A first pillar is mounted to each first interconnection pad, and second pillar is mounted to each second interconnection pad. The integrated circuit die is mounted in flip chip orientation to the leadframe with the first pillars soldered to the first silver spots and the second pillars soldered to the second silver spots. A resin body encapsulates the integrated circuit die mounted to the leadframe.