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公开(公告)号:US20140319322A1
公开(公告)日:2014-10-30
申请号:US14260664
申请日:2014-04-24
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor: Christophe Mandier , Alexis Marcellin
IPC: H04N5/378 , H01L27/146
CPC classification number: H04N5/378 , H01L27/14609 , H01L27/14612 , H01L27/14641
Abstract: An image sensor including an array of pixels, each having: a storage node coupled to a capacitive sense node by a transfer transistor; and a connection transistor coupling the pixel sense node to an intermediate node of the pixel, wherein each pixel has its intermediate node coupled to a node of application of a reset voltage by a reset transistor, and different pixels have their respective intermediate nodes interconnected by a conductive connection track.
Abstract translation: 一种包括像素阵列的图像传感器,每个像素具有:通过传输晶体管耦合到电容性感测节点的存储节点; 以及将像素感测节点耦合到像素的中间节点的连接晶体管,其中每个像素的中间节点耦合到由复位晶体管施加复位电压的节点,并且不同的像素具有通过一个 导电连接轨道。
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公开(公告)号:US09807334B1
公开(公告)日:2017-10-31
申请号:US15492139
申请日:2017-04-20
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor: Nicolas Moeneclaey , Tarek Lule , Alexis Marcellin
CPC classification number: H04N5/378 , H03M1/00 , H03M1/12 , H03M1/56 , H04N3/155 , H04N5/2173 , H04N5/335
Abstract: A device for conversion of an analog signal into a digital signal includes a clock signal generator and a ramp generator configured for delivering a rising voltage ramp. A comparator is configured for comparing the value of the analog signal and the value of the voltage ramp and for generating a comparison signal taking a first logical value when the two values are equal. A signal generator is configured for generating a counter signal equal to the inverse of the clock signal if the comparison signal takes its first value while the clock signal is in the high state, or a counter signal equal to the clock signal if the clock signal is in the low state. A counter is configured for counting the number of edges of the counter signal.
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公开(公告)号:US09288414B2
公开(公告)日:2016-03-15
申请号:US14260664
申请日:2014-04-24
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor: Christophe Mandier , Alexis Marcellin
IPC: H04N5/378 , H01L27/146
CPC classification number: H04N5/378 , H01L27/14609 , H01L27/14612 , H01L27/14641
Abstract: An image sensor including an array of pixels, each having: a storage node coupled to a capacitive sense node by a transfer transistor; and a connection transistor coupling the pixel sense node to an intermediate node of the pixel, wherein each pixel has its intermediate node coupled to a node of application of a reset voltage by a reset transistor, and different pixels have their respective intermediate nodes interconnected by a conductive connection track.
Abstract translation: 一种包括像素阵列的图像传感器,每个像素具有:通过传输晶体管耦合到电容性感测节点的存储节点; 以及将像素感测节点耦合到像素的中间节点的连接晶体管,其中每个像素的中间节点耦合到由复位晶体管施加复位电压的节点,并且不同的像素具有通过一个 导电连接轨道。
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