公开(公告)号：US08975154B2

公开(公告)日：2015-03-10

申请号：US13653911

申请日：2012-10-17

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Didier Dutartre ,  Zahra Aitfqirali-Guerry ,  Yves Campidelli ,  Denis Pellissier-Tanon

IPC: H01L21/76 ,  H01L21/762

CPC classification number: H01L21/76237

Abstract: A method for producing at least one deep trench isolation in a semiconductor substrate including silicon and having a front side may include forming at least one cavity in the semiconductor substrate from the front side. The method may include conformally depositing dopant atoms on walls of the cavity, and forming, in the vicinity of the walls of the cavity, a silicon region doped with the dopant atoms. The method may further include filling the cavity with a filler material to form the at least one deep trench isolation.

Abstract translation: 在包括硅并且具有前侧的半导体衬底中产生至少一个深沟槽隔离的方法可以包括从前侧形成半导体衬底中的至少一个空腔。 该方法可以包括在腔的壁上共形沉积掺杂剂原子，并且在空腔的壁附近形成掺杂有掺杂剂原子的硅区。 该方法还可以包括用填充材料填充空腔以形成至少一个深沟槽隔离。

公开(公告)号：US20130095636A1

公开(公告)日：2013-04-18

申请号：US13653911

申请日：2012-10-17

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Didier Dutartre ,  Zahra Aitfqirali-Guerry ,  Yves Campidelli ,  Denis Pellissier-Tanon

IPC: H01L21/762

CPC classification number: H01L21/76237

Abstract: A method for producing at least one deep trench isolation in a semiconductor substrate including silicon and having a front side may include forming at least one cavity in the semiconductor substrate from the front side. The method may include conformally depositing dopant atoms on walls of the cavity, and forming, in the vicinity of the walls of the cavity, a silicon region doped with the dopant atoms. The method may further include filling the cavity with a filler material to form the at least one deep trench isolation.

Abstract translation: 在包括硅并且具有前侧的半导体衬底中产生至少一个深沟槽隔离的方法可以包括从前侧形成半导体衬底中的至少一个空腔。 该方法可以包括在腔的壁上共形沉积掺杂剂原子，并且在空腔的壁附近形成掺杂有掺杂剂原子的硅区。 该方法还可以包括用填充材料填充空腔以形成至少一个深沟槽隔离。