公开(公告)号：US12032850B2

公开(公告)日：2024-07-09

申请号：US17752754

申请日：2022-05-24

申请人： SK hynix Inc.

发明人： Ji Hun Choi ,  Jeong Hyun Kim ,  Sung Ju Yoo

IPC分类号： G06F3/06

CPC分类号： G06F3/0655 ,  G06F3/061 ,  G06F3/0679

摘要： A memory controller includes a buffer, a prefetch controller, and a boot controller. The buffer stores workload information including a history of an expected I/O request expected to be received from a host during booting operation. The prefetch controller is configured to, before a target I/O request is received from the host after start of booting, read expected data corresponding to the expected I/O request from memory devices based on workload information, and store the expected data in the buffer. The boot controller updates the workload information based on the target I/O request depending on whether target data corresponding to the target I/O request is included in the expected data, and stores updated workload information in an area in which data is readable with a minimum number of accesses from a plurality of the memory devices.

公开(公告)号：US12118239B2

公开(公告)日：2024-10-15

申请号：US18475205

申请日：2023-09-27

申请人： SK hynix Inc.

发明人： Jeong Hyun Kim ,  Byong Woo Ryu ,  Ji Hun Choi ,  Son Hong Min ,  Sung Ju Yoo

IPC分类号： G06F3/06 ,  G06F13/16

CPC分类号： G06F3/0656 ,  G06F3/0625 ,  G06F3/0679 ,  G06F13/1668 ,  G06F13/1673

摘要： Embodiments of the present disclosure relate to a memory system and an operating method of the memory system. According to embodiments of the present disclosure, the memory system may receive a default enabled information from the host. The default enabled information indicates whether the host maintains a configuration of a host memory buffer in the host and target data stored in the host memory buffer when the memory system is in a low power mode state in which power supplied from the host is cut off.

公开(公告)号：US11880274B2

公开(公告)日：2024-01-23

申请号：US17694466

申请日：2022-03-14

申请人： SK hynix Inc.

发明人： Jeong Hyun Kim ,  Byong Woo Ryu ,  Ji Hun Choi ,  Sung Ju Yoo

IPC分类号： G06F11/10 ,  G06F11/07 ,  G06F3/06

CPC分类号： G06F11/1068 ,  G06F3/0619 ,  G06F3/0656 ,  G06F3/0659 ,  G06F3/0679 ,  G06F11/0772

摘要： A host device includes a Host Memory Buffer (HMB) including a plurality of memory areas, each memory area configured to store data provided from a storage device which is in communication with the host device, and a host controller configured to generate reliability information of each of the plurality of memory areas, and in communication with the storage device to provide the reliability information to the storage device.

公开(公告)号：US20240004811A1

公开(公告)日：2024-01-04

申请号：US18107008

申请日：2023-02-08

申请人： SK hynix Inc.

发明人： Ji Hun CHOI ,  Jeong Hyun KIM ,  Min Su SON ,  Sung Ju Yoo

IPC分类号： G06F13/16 ,  G06F13/18 ,  G06F12/02

CPC分类号： G06F13/1673 ,  G06F13/18 ,  G06F12/0238 ,  G06F2212/7201

摘要： A storage device of the present disclosure includes a memory device configured to store a plurality of address maps indicating a mapping relationship between a logical address and a physical address, and a memory controller configured to, when the storage device is in a power on state from a power off state, determine a priority rank of each of the plurality of address maps based on file attribute information received from a host and sequentially load the plurality of address maps according to the priority rank.

公开(公告)号：US11803322B2

公开(公告)日：2023-10-31

申请号：US17575089

申请日：2022-01-13

申请人： SK hynix Inc.

发明人： Jeong Hyun Kim ,  Byong Woo Ryu ,  Ji Hun Choi ,  Son Hong Min ,  Sung Ju Yoo

IPC分类号： G06F3/06 ,  G06F13/16

CPC分类号： G06F3/0656 ,  G06F3/0625 ,  G06F3/0679 ,  G06F13/1668 ,  G06F13/1673

摘要： Embodiments of the present disclosure relate to a memory system and an operating method of the memory system. According to embodiments of the present disclosure, the memory system may receive a default enabled information from the host. The default enabled information indicates whether the host maintains a configuration of a host memory buffer in the host and target data stored in the host memory buffer when the memory system is in a low power mode state in which power supplied from the host is cut off.