公开(公告)号：US12086416B2

公开(公告)日：2024-09-10

申请号：US18058183

申请日：2022-11-22

申请人： SK hynix Inc.

发明人： Seon Ju Lee ,  Jeong Sun Park

IPC分类号： G06F3/06

CPC分类号： G06F3/0613 ,  G06F3/0659 ,  G06F3/0679

摘要： A memory system may wait to receive one or more read commands from a reference time point, and read data, requested by the one or more read commands, from the memory device in response to a determination that it is possible to simultaneously read data divided and stored, as an M number of data units, in an M number of planes among a plurality of planes in response to the one or more read commands or that a maximum read wait time has elapsed from the reference time point, M being a natural number.

公开(公告)号：US11544002B2

公开(公告)日：2023-01-03

申请号：US16823619

申请日：2020-03-19

申请人： SK hynix Inc.

发明人： Dae Hoon Jang ,  Dong Ham Yim ,  Young Hoon Cha ,  Young Guen Choi ,  Jeong Sun Park ,  Cheon Ok Jeong

IPC分类号： G06F3/06 ,  G06F11/07

摘要： A memory system, a memory controller and an operating method are disclosed. When a target command which instructs an operation of writing target data to a memory device is received from a host, the target data is divided into data units, and a first data unit among the data units is controlled such that the entire first data unit is written to the memory device or none of the first data unit is written to the memory device. As a consequence, it is possible to write data in specific units in a memory system using a multi-core.