公开(公告)号：US10551411B2

公开(公告)日：2020-02-04

申请号：US15892931

申请日：2018-02-09

Applicant: SILICON LABORATORIES INC.

Inventor： Scott E. Caudle ,  Wenshui Zhang ,  Raymond A. Booher

IPC: G01R1/04 ,  G01R31/26

Abstract: A test system for testing semiconductor chips including a docking plate, a test card, chip sockets, a stiffener, and test electronics. Each test card has a uniform card configuration that may be used with any of several different handlers. Each test card includes conductive pads electrically coupled to and longitudinally offset from a socket interface along a length of the test card. The stiffener includes a test interface including conductive pins for electrically interfacing the conductive pads of the test card. The test card is supported by the stiffener so that it remains undeformed as each chip is plunged into a test socket. The test interface includes a basin that is covered by the test card to form a thermal isolation cavity for thermal separation from the test electronics. A uniform radio frequency interface is provided between each test card and a corresponding test interface.