公开(公告)号：US20240267269A1

公开(公告)日：2024-08-08

申请号：US18564068

申请日：2022-03-21

Applicant: SANECHIPS TECHNOLOGY CO., LTD.

Inventor： Gang WU ,  Junling ZHANG

IPC: H04L27/00 ,  H04B7/0452

CPC classification number: H04L27/0012 ,  H04B7/0452

Abstract: Provided are a multi-user multiple-input multiple-output detection method and apparatus, an electronic device, and a computer-readable storage medium. The method includes: in a case where it is determined that received data includes data for first user equipment and data for at least one second user equipment, determining a first detection method according to a modulation mode of the first user equipment (100); and performing multi-user joint detection on the received data with the first detection method (101).

公开(公告)号：US20240162911A1

公开(公告)日：2024-05-16

申请号：US17772970

申请日：2020-10-29

Applicant: SANECHIPS TECHNOLOGY CO., LTD.

Inventor： Gang WU

IPC: H03M1/06

CPC classification number: H03M1/0607

Abstract: Provided are a sampling clock phase mismatch error estimation method and apparatus, and a storage medium. This sampling clock phase mismatch error estimation method includes: a proportional relation between an estimation operator of a modular square subtraction method corresponding to each frequency interval of multiple frequency intervals and a sampling clock phase mismatch error of a time-interleaved analog to digital converter (TIADC) is acquired; a slope and an offset value of a fitting proportion line segment are counted; and a slope of a proportion line segment corresponding to a real-time estimation frequency is converted, and an offset value corresponding to the real-time estimation frequency is estimated through an interpolation according to a counted slope and a counted offset value, and the actual value of the sampling clock phase mismatch error is estimated according to a converted slope and an offset value estimated through the interpolation.

公开(公告)号：US20180034532A1

公开(公告)日：2018-02-01

申请号：US15551075

申请日：2015-12-29

Applicant: Sanechips Technology Co., Ltd.

Inventor： Gang WU

IPC: H04B7/08 ,  H04L25/03 ,  H04L27/26 ,  H04L25/02

CPC classification number: H04B7/0854 ,  H04B7/08 ,  H04B17/345 ,  H04J11/0036 ,  H04L25/0228 ,  H04L25/0244 ,  H04L25/0246 ,  H04L25/03993 ,  H04L27/26 ,  H04L27/2647

Abstract: Disclosed in an embodiment of the disclosure is an interference rejection combining (IRC) method supporting transmit diversity, in which an N*N interference and noise covariance matrix corresponding to one subcarrier is generated from signals, in a transmit diversity mode, received at cell reference signal (CRS) resource positions via N receiving antennas, where N is greater than or equal to 3; Cholescy decomposition and upper triangular matrix inversion is performed on the N*N interference and noise covariance matrix to obtain an N*N block matrix; the N*N block matrix is expanded to a 2N*2N noise whitening matrix; and the received signals and channel estimation values are whitened according to the noise whitening matrix, and the whitened received signals and channel estimation values used to obtain a minimum mean square error-IRC (MMSE-IRC) processing result. Also disclosed are an IRC device supporting the transmit diversity, and a computer storage medium.