公开(公告)号：US20230046552A1

公开(公告)日：2023-02-16

申请号：US17874370

申请日：2022-07-27

申请人： SAMSUNG ELECTRONICS., LTD.

发明人： Eldho Pathiyakkara Thombra Mathew ,  Prashant Vishwanath Mahendrakar ,  Jin In SO ,  Jong-Geon LEE

IPC分类号： G06F3/06

摘要： A Near Memory Processing (NMP) module including: a plurality of memory units: an Input/Output (I/O) interface configured to receive commands from a host system, wherein the host system includes a host memory controller configured to access the plurality of memory units: a decoder configured to decode the commands and generate a trigger; and an NMP memory controller configured to: receive the trigger from the decoder; and generate a signal in response to the trigger to synchronize the NMP module with the host system.