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公开(公告)号：US20200066799A1
公开(公告)日：2020-02-27
申请号：US16359146
申请日：2019-03-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dong-Jun Seong , Yong-Jin Park , Jun-Hwan Paik , Gyu-Hwan Oh
Abstract: A variable resistance memory device may include a first conductive line, a plurality of stacked structures, and a mold pattern. The first conductive line may be formed on a substrate. The plurality of stacked structures may be formed on the first conductive line, and each of the plurality of stacked structures includes a lower electrode, a variable resistance pattern, and a middle electrode stacked on one another. The mold pattern may be formed on the first conductive line to fill a space between the plurality of stacked structures. An upper portion of the mold pattern may include a surface treated layer and a lower portion of the mold pattern may include a non-surface treated layer.
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公开(公告)号：US10692933B2
公开(公告)日：2020-06-23
申请号：US16359146
申请日：2019-03-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dong-Jun Seong , Yong-Jin Park , Jun-Hwan Paik , Gyu-Hwan Oh
Abstract: A variable resistance memory device may include a first conductive line, a plurality of stacked structures, and a mold pattern. The first conductive line may be formed on a substrate. The plurality of stacked structures may be formed on the first conductive line, and each of the plurality of stacked structures includes a lower electrode, a variable resistance pattern, and a middle electrode stacked on one another. The mold pattern may be formed on the first conductive line to fill a space between the plurality of stacked structures. An upper portion of the mold pattern may include a surface treated layer and a lower portion of the mold pattern may include a non-surface treated layer.
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