公开(公告)号：US20150179651A1

公开(公告)日：2015-06-25

申请号：US14475687

申请日：2014-09-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hoon PARK ,  Young-Seok KIM ,  Yeong-Cheol LEE

IPC: H01L27/108

CPC classification number: H01L27/10805 ,  H01L21/76224 ,  H01L21/764 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10873 ,  H01L27/10885 ,  H01L27/10888

Abstract: A semiconductor device includes a bit line structure on a substrate, the bit line structure having a polysilicon layer pattern doped with impurities, and a metal layer pattern on the polysilicon layer pattern, a first spacer surrounding and contacting a sidewall of the bit line structure, the first spacer having a constant thickness, and a capacitor contact structure on the substrate, an air gap being defined between the capacitor contact structure and the first spacer.

Abstract translation: 半导体器件包括在衬底上的位线结构，位线结构具有掺杂有杂质的多晶硅层图案和多晶硅层图案上的金属层图案，围绕并接触位线结构的侧壁的第一间隔件， 所述第一间隔物具有恒定的厚度，以及所述衬底上的电容器接触结构，气隙限定在所述电容器接触结构和所述第一间隔物之间​​。

公开(公告)号：US20190206872A1

公开(公告)日：2019-07-04

申请号：US16170665

申请日：2018-10-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-A KIM ,  Yong-Kwan KIM ,  Se-Keun PARK ,  Joo-Young LEE ,  Cha-Won KOH ,  Yeong-Cheol LEE

IPC: H01L27/108

CPC classification number: H01L27/10855 ,  H01L21/28525 ,  H01L21/3065 ,  H01L21/76879 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10885 ,  H01L27/10888

Abstract: A semiconductor device and methods of manufacturing the same are provided. The semiconductor device includes a substrate, word lines, a doped junction, bit line structures, and buried contacts. The substrate has active regions. The word lines extend across the active regions. The doped junction has impurities and is arranged at the active regions, and includes first junctions and second junctions, each first junction arranged at a central portion of one of the active regions and each second junction arranged at an end portion of another one of the active regions, a buried semiconductor layer being included in each second junction. The bit line structures contact with a respective one of the first junctions. The buried contacts are arranged in a matrix shape, each contacting with a respective one of the second junctions and the included buried semiconductor layer and simultaneously contacting with a charge storage for storing data.

公开(公告)号：US20160148937A1

公开(公告)日：2016-05-26

申请号：US15009948

申请日：2016-01-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hoon PARK ,  Young-Seok KIM ,  Yeong-Cheol LEE

IPC: H01L27/108

CPC classification number: H01L27/10805 ,  H01L21/76224 ,  H01L21/764 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10873 ,  H01L27/10885 ,  H01L27/10888

Abstract: A semiconductor device includes a bit line structure on a substrate, the bit line structure having a polysilicon layer pattern doped with impurities, and a metal layer pattern on the polysilicon layer pattern, a first spacer surrounding and contacting a sidewall of the bit line structure, the first spacer having a constant thickness, and a capacitor contact structure on the substrate, an air gap being defined between the capacitor contact structure and the first spacer.

Abstract translation: 半导体器件包括衬底上的位线结构，位线结构具有掺杂杂质的多晶硅层图案，多晶硅层图案上的金属层图案，围绕并接触位线结构侧壁的第一间隔物， 所述第一间隔物具有恒定的厚度，以及所述衬底上的电容器接触结构，气隙限定在所述电容器接触结构和所述第一间隔物之间​​。