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公开(公告)号:US20220415919A1
公开(公告)日:2022-12-29
申请号:US17897255
申请日:2022-08-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JUNHYOUNG KIM , JISUNG CHEON , YOONHWAN SON , SEUNGMIN LEE
IPC: H01L27/11578 , H01L27/11568 , H01L27/11573
Abstract: A semiconductor device includes a lower structure; a first upper structure including lower gate layers on the lower structure; a second upper structure including upper gate layers on the first upper structure; separation structures penetrating the first and second upper structures on the lower structure; a memory vertical structure penetrating the lower and upper gate layers between the separation structures; and a first contact plug penetrating the first and second upper structures and spaced apart from the lower and upper gate layers. Each of the first contact plug and the memory vertical structure includes a lateral surface having a bent portion. The bent portion of the lateral surface is disposed between a first height level on which an uppermost gate layer of the lower gate layers is disposed and a second height level on which a lowermost gate layer of the upper gate layers is disposed.
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公开(公告)号:US20210305271A1
公开(公告)日:2021-09-30
申请号:US17032128
申请日:2020-09-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JUNHYOUNG KIM , JISUNG CHEON , YOONHWAN SON , SEUNGMIN LEE
IPC: H01L27/11578 , H01L27/11573 , H01L27/11568
Abstract: A semiconductor device includes a lower structure; a first upper structure including lower gate layers on the lower structure; a second upper structure including upper gate layers on the first upper structure; separation structures penetrating the first and second upper structures on the lower structure; a memory vertical structure penetrating the lower and upper gate layers between the separation structures; and a first contact plug penetrating the first and second upper structures and spaced apart from the lower and upper gate layers. Each of the first contact plug and the memory vertical structure includes a lateral surface having a bent portion. The bent portion of the lateral surface is disposed between a first height level on which an uppermost gate layer of the lower gate layers is disposed and a second height level on which a lowermost gate layer of the upper gate layers is disposed.
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