公开(公告)号：US20220377273A1

公开(公告)日：2022-11-24

申请号：US17878285

申请日：2022-08-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Yong KIM ,  Kyung-Min KIM ,  Hyuk OH ,  Hyeok Jong LEE ,  Seung Hoon JUNG ,  Woong JOO ,  Hee Sung CHAE

IPC: H04N5/378 ,  H04N5/369

Abstract: An analog-digital converter includes a count code generator to receive a code generation clock signal from a clock signal generator and to output a count code according to the code generation clock signal, a latch to latch the count code, an operating circuit to generate a count value of the count code and to output a digital signal based on the count value, and a transfer controller to transfer the count code from the latch to the operating circuit. The transfer controller determines whether to transfer the count code according to a logic level of a count enable clock signal generated from the clock signal generator.