公开(公告)号：US20240349491A1

公开(公告)日：2024-10-17

申请号：US18534400

申请日：2023-12-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myeong-Dong Lee ,  Jongmin Kim ,  Taejin Park ,  Seung-Bo Ko ,  Hui-Jung Kim

IPC: H10B12/00

CPC classification number: H10B12/485 ,  H10B12/482 ,  H10B12/488

Abstract: An example semiconductor memory device includes first and second active patterns, which are extended in a first direction and are disposed side by side in a second direction. Each of the first and second active patterns includes first and second edge portions, which are spaced apart from each other in the first direction. A pair of word lines are disposed to cross each of the first and second active patterns, a pair of bit lines are disposed on each of the first and second active patterns and are extended in a third direction, and a storage node contacts on the first edge portion of the first active pattern. When measured in the second direction, a first width of the storage node contact at a first level is larger than a second width at a second level. The first level is lower than the second level.