公开(公告)号：US20240162127A1

公开(公告)日：2024-05-16

申请号：US18216157

申请日：2023-06-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sanghyuck Oh ,  Seonghoon Bae ,  Kwangok Jeong

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49811 ,  H01L23/3128 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204

Abstract: A semiconductor package according to an example embodiment of the present disclosure comprises: a lower redistribution structure including an insulating layer, a connection pad disposed on an upper surface of the insulating layer, and an upper pad; a semiconductor chip mounted on the lower redistribution structure and connected to the upper pad; a conductive post disposed on the connection pad; at least one dummy post disposed on the lower redistribution structure; and an upper redistribution structure disposed on the semiconductor chip and connected to the conductive post, and a height of the at least one dummy post is smaller than a height of the conductive post.