公开(公告)号：US11200165B2

公开(公告)日：2021-12-14

申请号：US16526452

申请日：2019-07-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang Soo Ko ,  Jae Gon Kim ,  Kyoung Young Kim ,  Sang Hyuck Ha

IPC: G06F12/0802 ,  G06F13/42 ,  G06F3/06 ,  G06N3/08

Abstract: A semiconductor device is provided. The semiconductor device comprises a first memory unit including a first memory area, and a first logic area electrically connected to the first memory area, the first logic area including a cache memory and an interface port. The first memory unit executes a data transmission and reception operation with a memory unit adjacent to the first memory unit via the first interface port and the cache memory.

公开(公告)号：US11789865B2

公开(公告)日：2023-10-17

申请号：US17545797

申请日：2021-12-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang Soo Ko ,  Jae Gon Kim ,  Kyoung Young Kim ,  Sang Hyuck Ha

IPC: G06F12/0802 ,  G06F3/06 ,  G06F13/42 ,  G06N3/08

CPC classification number: G06F12/0802 ,  G06F3/0604 ,  G06F3/0655 ,  G06F3/0673 ,  G06F13/4282 ,  G06N3/08 ,  G06F2212/60

Abstract: A semiconductor device is provided. The semiconductor device comprises a first memory unit including a first memory area, and a first logic area electrically connected to the first memory area, the first logic area including a cache memory and an interface port. The first memory unit executes a data transmission and reception operation with a memory unit adjacent to the first memory unit via the first interface port and the cache memory.