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公开(公告)号:US20230153565A1
公开(公告)日:2023-05-18
申请号:US17430644
申请日:2021-07-09
Applicant: SAMSUNG ELECTRONICS CO., LTD
Inventor: Brijraj SINGH , Mayukh DAS , Yash Hemant JAIN , Sharan Kumar ALLUR , Venkappa MALA , Praveen Doreswamy NAIDU
Abstract: A method of deep neural network (DNN) modularization for optimal loading includes receiving, by an electronic device, a DNN model for execution, obtaining, by the electronic device, a plurality of parameters associated with the electronic device and a plurality of parameters associated with the DNN model, determining, by the electronic device, a number of sub-models of the DNN model and a splitting index, based on the obtained plurality of parameters associated with the electronic device and the obtained plurality of parameters associated with the DNN model, and splitting, by the electronic device, the received DNN model into a plurality of sub-models, based on the determined number of sub-models of the DNN model and the determined splitting index.
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公开(公告)号:US20230127001A1
公开(公告)日:2023-04-27
申请号:US18082305
申请日:2022-12-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Mayukh DAS , Brijraj SINGH , Pradeep NELAHONNE SHIVAMURTHAPPA , Aakash KAPOOR , Rajath Elias SOANS , Soham Vijay DIXIT , Sharan Kumar ALLUR , Venkappa MALA
IPC: G06N3/082 , G06V10/776 , G06V10/82 , G06V40/16
Abstract: A method for generating an optimal neural network (NN) model may include determining intermediate outputs of the NN model by passing an input dataset through each intermediate exit gate of the plurality of intermediate exit gates, determining an accuracy score for each intermediate exit gate of the plurality of intermediate exit gates based on a comparison of the final output of the NN model with the intermediate output, identifying an earliest intermediate exit gate that produces the intermediate output closer to the final output based on the accuracy score, and generating the optimal NN model by removing remaining layers of the plurality of layers and remaining intermediate exit gates of the plurality of intermediate exit gates located after the determined earliest intermediate exit gate.
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