公开(公告)号：US20220392520A1

公开(公告)日：2022-12-08

申请号：US17569679

申请日：2022-01-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Daero KIM ,  Kyunghoi KOO ,  Sujeong KIM ,  Juyoung KIM ,  Sanghune PARK ,  Jiyeon PARK ,  Jihun OH ,  Kyoungwon LEE

IPC: G11C11/4096 ,  G11C11/4076

Abstract: A memory controller includes a first receiver configured to compare a read reference voltage with a piece of data received through a first data line and output a first piece of data; a first duty adjuster configured to adjust a duty of the first piece of data; a second receiver configured to compare the read reference voltage with a piece of data received through a second data line and output a second piece of data; a second duty adjuster configured to adjust a duty of the second piece of data; and a training circuit configured to perform a training operation on pieces of data received through a plurality of data lines, to obtain a target read reference voltage for each piece of data and correct a duty of each piece of data based on a level of the target read reference voltage for each piece of data.

公开(公告)号：US20230021819A1

公开(公告)日：2023-01-26

申请号：US17871538

申请日：2022-07-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyoungwon LEE ,  Jintae KIM ,  Sungwon ROH

IPC: H03M1/36

Abstract: An analog-to-digital converter (ADC) for converting an analog signal into a digital signal includes an amplifier circuit configured to receive the analog signal, and to generate a plurality of amplifier signals by amplifying the analog signal; a comparison circuit configured to compare a plurality of voltage levels corresponding to the plurality of amplifier signals with a positive reference voltage level and a negative reference voltage level, and to output conversion target signals based on a result of the comparison; and a converter circuit configured to convert the conversion target signals into a plurality of digital signals.