公开(公告)号：US09542264B2

公开(公告)日：2017-01-10

申请号：US14541303

申请日：2014-11-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kwangseok Im ,  Jung-Yeon Yoon ,  Han-Ju Lee ,  Ha-Neul Jeong

IPC: G11C29/00 ,  G06F11/10 ,  H03M13/09

CPC classification number: G06F11/1004 ,  G06F11/1008 ,  G06F11/1076 ,  H03M13/09

Abstract: A memory controller comprises at least one interface configured to receive a request, user data, and an address from an external source, a first data check engine configured to generate data check information based on the received address and the user data in response to the received request, and a second data check engine configured to check the integrity of the user data based on the generated data check information where the user data is transmitted to the nonvolatile memory. The memory controller is configured to transmit the user data received from the external source to an external destination where the integrity of the user data is verified according to a check result, and is further configured to transmit an interrupt signal to the external source and the external destination where the check result indicates that the user data comprises an error.

Abstract translation: 存储器控制器包括被配置为从外部源接收请求，用户数据和地址的至少一个接口，第一数据检查引擎，被配置为基于接收到的地址和用户数据响应于所接收的地址生成数据检查信息 以及第二数据检查引擎，被配置为基于将用户数据发送到非易失性存储器的所生成的数据检查信息来检查用户数据的完整性。 存储器控制器被配置为根据检查结果将从外部源接收的用户数据发送到外部目的地，其中用户数据的完整性被验证，并且还被配置为将中断信号发送到外部源和外部 检查结果指示用户数据包含错误的目的地。