公开(公告)号：US10395719B2

公开(公告)日：2019-08-27

申请号：US16005880

申请日：2018-06-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Cheol Kim ,  Kee-Won Kwon ,  Ji-Su Min ,  Rak-Joo Sung ,  Sung-gi Ahn

IPC: G11C11/22 ,  G11C7/12 ,  G11C5/06 ,  G11C15/04

Abstract: A memory device includes a storage circuit, a first driving circuit, and a second driving circuit. The storage circuit stores first data and compares the first data and second data. The first driving circuit selectively drives a matching line to a first logic state, depending on a comparison result of the first data and the second data by the storage circuit. The second driving circuit drives the matching line to a second logic state regardless of the comparison result.

公开(公告)号：US20190130958A1

公开(公告)日：2019-05-02

申请号：US16005880

申请日：2018-06-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Cheol Kim ,  Kee-Won Kwon ,  Ji-Su Min ,  Rak-Joo Sung ,  Sung-gi Ahn

IPC: G11C11/22 ,  G11C5/06 ,  G11C7/12

CPC classification number: G11C11/2293 ,  G11C5/063 ,  G11C7/12 ,  G11C15/04 ,  G11C15/043

Abstract: A memory device includes a storage circuit, a first driving circuit, and a second driving circuit. The storage circuit stores first data and compares the first data and second data. The first driving circuit selectively drives a matching line to a first logic state, depending on a comparison result of the first data and the second data by the storage circuit. The second driving circuit drives the matching line to a second logic state regardless of the comparison result.