公开(公告)号：US12022619B2

公开(公告)日：2024-06-25

申请号：US18309413

申请日：2023-04-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Hyun Seok ,  Gyu Chae Lee ,  Jeong Hyeon Cho

IPC: H05K1/18 ,  H01L25/18 ,  H05K1/11

CPC classification number: H05K1/181 ,  H01L25/18 ,  H05K1/117 ,  H05K2201/09227 ,  H05K2201/09509 ,  H05K2201/10159 ,  H05K2201/10522 ,  H05K2201/10545 ,  H05K2201/10734

Abstract: A semiconductor chip module includes a PCB including first and second faces; a buffer on the first face; a first chip on the first face, and including a first connection terminal and a second connection terminal, a first signal being provided to the first connection terminal, and a second signal being provided to the second connection terminal; a second chip on the second face, and including a third connection terminal to which the first signal is provided, and a fourth connection terminal to which the second signal is provided. The first connection terminal and the third connection terminal receive the first signal from the buffer at the same time. The first connection terminal is closer to the buffer as compared with the second connection terminal. The third connection terminal is closer to the buffer as compared with the fourth connection terminal.

公开(公告)号：US20230269876A1

公开(公告)日：2023-08-24

申请号：US18309413

申请日：2023-04-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Hyun Seok ,  Gyu Chae Lee ,  Jeong Hyeon Cho

IPC: H05K1/18 ,  H01L25/18

CPC classification number: H05K1/181 ,  H01L25/18 ,  H05K2201/09227 ,  H05K2201/10159 ,  H05K2201/09509 ,  H05K2201/10545 ,  H05K2201/10734 ,  H05K1/117

Abstract: A semiconductor chip module includes a PCB including first and second faces; a buffer on the first face; a first chip on the first face, and including a first connection terminal and a second connection terminal, a first signal being provided to the first connection terminal, and a second signal being provided to the second connection terminal; a second chip on the second face, and including a third connection terminal to which the first signal is provided, and a fourth connection terminal to which the second signal is provided. The first connection terminal and the third connection terminal may receive the first signal from the buffer at the same time. The first connection terminal may be closer to the buffer as compared with the second connection terminal. The third connection terminal may be closer to the buffer as compared with the fourth connection terminal.

公开(公告)号：US11678437B2

公开(公告)日：2023-06-13

申请号：US17210907

申请日：2021-03-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Hyun Seok ,  Gyu Chae Lee ,  Jeong Hyeon Cho

IPC: H05K1/18 ,  H01L25/18 ,  H05K1/11

CPC classification number: H05K1/181 ,  H01L25/18 ,  H05K1/117 ,  H05K2201/09227 ,  H05K2201/09509 ,  H05K2201/10159 ,  H05K2201/10522 ,  H05K2201/10545 ,  H05K2201/10734

Abstract: A semiconductor chip module includes a PCB including first and second faces; a buffer on the first face; a first chip on the first face, and including a first connection terminal and a second connection terminal, a first signal being provided to the first connection terminal, and a second signal being provided to the second connection terminal; a second chip on the second face, and including a third connection terminal to which the first signal is provided, and a fourth connection terminal to which the second signal is provided. The first connection terminal and the third connection terminal receive the first signal from the buffer at the same time. The first connection terminal be is closer to the buffer as compared with the second connection terminal. The third connection terminal is closer to the buffer as compared with the fourth connection terminal.