公开(公告)号：US20240324231A1

公开(公告)日：2024-09-26

申请号：US18383532

申请日：2023-10-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUSEONG MIN ,  JAE-BOK BAEK ,  JEEHOON HAN

IPC: H10B43/40 ,  H10B41/27 ,  H10B41/41 ,  H10B43/27

CPC classification number: H10B43/40 ,  H10B41/27 ,  H10B41/41 ,  H10B43/27

Abstract: A semiconductor device includes: a gate electrode on a semiconductor substrate; a gate dielectric pattern between the gate electrode and the semiconductor substrate; a first semiconductor pattern on the semiconductor substrate adjacent to a first side of the gate electrode; and a second semiconductor pattern on the semiconductor substrate adjacent to a second side of the gate electrode, wherein the first semiconductor pattern includes: a first via part in contact with the semiconductor substrate; and a first plate part on the first via part, wherein the second semiconductor pattern includes: a second via part in contact with the semiconductor substrate; and a second plate part on the second via part, wherein each of the first and second plate parts extends lengthwise in a direction parallel to a top surface of the semiconductor substrate.