METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

    公开(公告)号:US20240290626A1

    公开(公告)日:2024-08-29

    申请号:US18587326

    申请日:2024-02-26

    CPC classification number: H01L21/3086 H01L21/0274 H01L21/31144 H10B12/50

    Abstract: A method of manufacturing a semiconductor device includes forming an etch target layer in a surface of a cell region comprising a cell center region and a cell edge region surrounding the cell center region, forming an edge mask pattern on the surface of the cell edge region through a quadruple patterning process on the etch target layer, and forming a plurality of center mask patterns spaced apart from each other on the cell center region, and forming a first etch pattern on the cell edge region by etching the etch target layer by using the edge mask pattern and the plurality of center mask patterns as etch masks and forming a plurality of second etch patterns spaced apart from each other on the cell center region.

    SEMICONDUCTOR DEVICE
    4.
    发明申请

    公开(公告)号:US20250071969A1

    公开(公告)日:2025-02-27

    申请号:US18623816

    申请日:2024-04-01

    Abstract: A semiconductor device may include a plurality of active patterns disposed on a substrate, a gate structure extending in a first direction, a bit line structure extending in a second direction, and a plurality of capacitors electrically connected to the plurality of active patterns, respectively, the plurality of active patterns having a shape extending in a third direction oblique to the first and second directions, the gate structure passing through centers of the plurality of active patterns, the bit line structure connected to first end portions of the plurality of active patterns, the plurality of capacitors connected to second end portions of the plurality of active patterns, respectively, the first end portion and the second end portion positioned at opposite sides with respect to the gate structure, and the first end portion and the second end portion having point-symmetrical shapes with respect to a center of the active pattern.

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