公开(公告)号：US20240260256A1

公开(公告)日：2024-08-01

申请号：US18424919

申请日：2024-01-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taeyoung EOM ,  Sunghoon Bae ,  Halim Noh ,  Heecheol Shin

IPC: H10B12/00

CPC classification number: H10B12/482 ,  H10B12/033 ,  H10B12/315 ,  H10B12/50

Abstract: A semiconductor device includes a substrate having an active region defined by a device separation layer, a plurality of bit lines on the substrate, a buried contact disposed on the substrate between adjacent bit lines among the plurality of bit lines and connected to the active region, an intermediate conductive layer disposed on the buried contact, a landing pad disposed on the intermediate conductive layer, and an insulating pattern on a sidewall of the landing pad and contacting at least a portion of a top surface of the intermediate conductive layer.