公开(公告)号：US20230189504A1

公开(公告)日：2023-06-15

申请号：US17953401

申请日：2022-09-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Keon Hee PARK ,  Soo Ho SHIN ,  Hyeon-Woo JANG ,  Dong-Sik PARK ,  Ga Eun LEE

IPC: H01L27/108

CPC classification number: H01L27/10814 ,  H01L27/10823

Abstract: A semiconductor memory device includes a landing pad on a substrate, a lower electrode on and connected to the landing pad, a dielectric layer on and extending along a profile of the lower electrode, an upper electrode on the dielectric layer, and an upper plate electrode on the upper electrode, the upper plate electrode including a first sub-plate electrode and a second sub-plate electrode doped with boron, a first concentration of the boron in the first sub-plate electrode being greater than a second concentration of the boron in the second sub-plate electrode.

公开(公告)号：US20210192933A1

公开(公告)日：2021-06-24

申请号：US16074378

申请日：2016-04-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min Shik SOHN ,  Dong Seok KIM ,  Sun A KIM ,  Se Hyun PARK ,  Ga Eun LEE ,  Ye Nah LEE ,  Eun Bi CHO

IPC: G08C17/02

Abstract: An electronic apparatus according to the present invention includes: a communicator configured to communicate with a plurality of electronic devices; and a controller configured to determine a second electronic device capable of displaying information of a user interface (UI) for controlling a first electronic device, among the plurality of electronic devices, based on at least one of information about the plurality of electronic devices and information about a user, in response to an event of the user which makes a request for controlling the first electronic device among the plurality of electronic devices, and control the information of the UI to be transmitted to the determined second electronic device.
In such an electronic apparatus, states of a user and peripheral devices are determined to provide a UI optimized to control a device-to-be-controlled, thereby improving user convenience.

公开(公告)号：US20250142813A1

公开(公告)日：2025-05-01

申请号：US18648797

申请日：2024-04-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soo Ho SHIN ,  Ji Hoon CHANG ,  Ga Eun LEE ,  Hyeon-Woo JANG

IPC: H10B12/00 ,  H01L23/528 ,  H01L29/51

Abstract: A semiconductor memory device includes a substrate including a cell area and a peripheral area defined around the cell area, a peripheral gate on the peripheral area and including a peripheral gate conductive film, peripheral wiring lines on the peripheral gate, peripheral wiring capping films respectively in contact with the peripheral wiring lines, wherein each peripheral wiring capping film includes upper and lower surfaces, and a peripheral wiring isolation pattern isolating adjacent peripheral wiring lines, and contacting a sidewall of the peripheral wiring lines, wherein the lower surface of each peripheral wiring capping film faces the substrate and contacts an upper surface of the peripheral wiring extension line, wherein a height from an upper surface of the substrate to the upper surface of each peripheral wiring extension line is smaller than a height from the upper surface of the substrate to an upper surface of the peripheral wiring isolation pattern.