公开(公告)号：US20250056789A1

公开(公告)日：2025-02-13

申请号：US18620333

申请日：2024-03-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dae-Jin Nam ,  Sung-Hwan Jang ,  Won Hee Choi ,  Sung Uk Jang

IPC: H10B12/00

Abstract: The present disclosure relates to semiconductor memory devices. An example semiconductor memory device comprises a substrate, a structure including word lines and interlayer insulating films alternately stacked on the substrate, a channel region disposed between two adjacent word lines in a vertical direction, a first source/drain region disposed on a first side of the channel region, a second source/drain region disposed on a second side of the channel region, a bit line which extends in the vertical direction on the substrate and is connected to the first source/drain region, a capping insulating film disposed between the bit line and the word lines, and a data storage connected to the second source/drain region. At least a part of the first source/drain region protrudes from a sidewall of the capping insulating film toward the bit line.