公开(公告)号：US20190165975A1

公开(公告)日：2019-05-30

申请号：US16191611

申请日：2018-11-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Barosaim SUNG ,  Chilun LO ,  Jae-hoon LEE ,  Jong-woo LEE ,  Seung-hyun OH

IPC: H04L27/227 ,  H04L27/38 ,  H03G3/30 ,  H04B1/403

Abstract: A radio frequency (RF) integrated circuit is provided. The RF integrated circuit supports carrier aggregation and includes first receiving circuits and a first shared phase locked loop circuit that provides a first frequency signal of a first frequency to the first receiving circuits. One of the first receiving circuits includes an analog to digital converter (ADC) and a digital conversion circuit. The ADC converts an RF signal received by the one of the first receiving circuits to a digital signal by using the first frequency signal. The digital conversion circuit generates a digital baseband signal by performing frequency down conversion on the digital signal.

公开(公告)号：US20210336586A1

公开(公告)日：2021-10-28

申请号：US17173943

申请日：2021-02-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong Mi LEE ,  Yong LIM ,  Chilun LO

IPC: H03F1/30 ,  H03F3/21 ,  H03F1/26

Abstract: A noise filtering circuit including: an amplifier which receives a reference bias through a first input terminal, generates an amplified output voltage and outputs the amplified output voltage through an output terminal, and receives an output voltage generated on the basis of the amplified output voltage through a second input terminal; a resistance component connected between the output terminal of the amplifier and the second input terminal; and a capacitor connected to the resistance component.

公开(公告)号：US20180219559A1

公开(公告)日：2018-08-02

申请号：US15702962

申请日：2017-09-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-hoon LEE ,  Jong-woo LEE ,  Chilun LO ,  Seung-hyun OH ,  Jong-mi LEE

IPC: H03M3/00

CPC classification number: H03M3/464 ,  H03M3/426 ,  H03M3/434 ,  H03M3/436 ,  H03M3/498

Abstract: A variable feedback gain delta modulator includes group of capacitors commonly connected to a first terminal and are respectively classified into a first capacitor group and a second capacitor group; a comparator for sequentially generating n-bit digital output signals based on a voltage of the first terminal; and a switch group including switches respectively connected to the capacitors, wherein the switches are respectively classified into a first switch group and a second switch group respectively connected to the first capacitor group and the second capacitor group, and the first switch group and the second switch group respectively operate according to a first control signal and a second control signal that are determined based on the n-bit digital output signals and the variable feedback gain.