公开(公告)号：US20250105810A1

公开(公告)日：2025-03-27

申请号：US18825204

申请日：2024-09-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kibaek Kwon ,  Byoungjoo Yoo ,  Youngho Choi

IPC: H03F3/45 ,  H03F1/02

Abstract: Provided are a differential amplifier forming a first feedback loop and a second feedback loop by including feedback loop circuits, an electronic device, and an operating method thereof. The differential amplifier configured to generate at least one pair of differential output signals by amplifying at least one pair of differential input signals and to generate an output common-mode signal based on the at least one pair of differential output signals. The main amplifier includes a first current mirror that generates first currents. A first feedback loop circuit is connected to an output node of the main amplifier which outputs the output common-mode signal, and forms a first feedback loop that feeds back the output common-mode signal. A second feedback loop circuit generates a control signal that controls the first currents based on the output common-mode signal, and forms a second feedback loop.

公开(公告)号：US20240223233A1

公开(公告)日：2024-07-04

申请号：US18375827

申请日：2023-10-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dasom Park ,  Donghyuk Lim ,  Youngho Choi ,  Kyeongjoon Ko ,  Byoungjoo Yoo

IPC: H04B1/16 ,  H03F3/19 ,  H03K3/037 ,  H03K5/24

CPC classification number: H04B1/16 ,  H03F3/19 ,  H03K3/037 ,  H03K5/24

Abstract: A receiver is provided. The receives includes: a signal detection circuit configured to receive differential signals having a variable data rate, and provide a detection signal based on the differential signals corresponding to a first data pattern of a first frequency, wherein the first data pattern of the first frequency indicates an exit from an electrical idle state; an analog-digital converter circuit configured to generate sample data by sampling the differential signals at a second frequency, and identify whether the sample data corresponds to a second data pattern which indicates normal data; and a control circuit configured to enable the analog-digital converter circuit based on the detection signal, and store the sample data. The first frequency is lower than the second frequency.