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公开(公告)号:US20200312783A1
公开(公告)日:2020-10-01
申请号:US16668289
申请日:2019-10-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Byoung-Gug MIN , Younhee KANG , Min-Woo SONG
IPC: H01L23/552 , H01L25/00 , H01L23/498
Abstract: A semiconductor package including a first semiconductor chip having an upper surface, a lower surface that is opposite to the upper surface, and a sidewall between the upper surface and the lower surface; a capping insulation layer covering the upper surface and the sidewall of the first semiconductor chip; and a shielding layer on the capping insulation layer, wherein a lower portion of the capping insulation layer includes a laterally protruding capping protrusion contacting a lower surface of the shielding layer.
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公开(公告)号:US20170358540A1
公开(公告)日:2017-12-14
申请号:US15622708
申请日:2017-06-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Byoung-Gug MIN , Sungil CHO , Jaehoon CHOI , Shi-kyung KIM
IPC: H01L23/552
CPC classification number: H01L23/552 , H01L21/561 , H01L23/295 , H01L23/3128 , H01L23/3135 , H01L24/16 , H01L2224/16227 , H01L2224/97 , H01L2924/15311 , H01L2924/1815 , H01L2924/3025 , H01L2224/81
Abstract: Semiconductor packages and a methods for manufacturing a semiconductor package are provided. The method includes providing a package including a substrate, a semiconductor chip provided on the substrate, and a molding layer provided on the substrate and covering the semiconductor chip, the substrate including a ground pattern exposed at one surface of the substrate; and applying a solution including metal particles and a conductive carbon material onto the molding layer to form a shielding layer covering the molding layer. The shielding layer includes the metal particles and the conductive carbon material connected to at least one of the metal particles. The shielding layer extends onto the one surface of the substrate and is electrically connected to the ground pattern.
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公开(公告)号:US20220199549A1
公开(公告)日:2022-06-23
申请号:US17693545
申请日:2022-03-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Byoung-Gug MIN , Younhee KANG , Min-Woo SONG
IPC: H01L23/552 , H01L23/498 , H01L25/00
Abstract: A semiconductor package including a first semiconductor chip having an upper surface, a lower surface that is opposite to the upper surface, and a sidewall between the upper surface and the lower surface; a capping insulation layer covering the upper surface and the sidewall of the first semiconductor chip; and a shielding layer on the capping insulation layer, wherein a lower portion of the capping insulation layer includes a laterally protruding capping protrusion contacting a lower surface of the shielding layer.
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