公开(公告)号：US20200351709A1

公开(公告)日：2020-11-05

申请号：US16901736

申请日：2020-06-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bu-Seop JUNG ,  Bum-Jib KIM

IPC: H04W28/06 ,  H04L29/06 ,  H04W52/02 ,  H04L29/08 ,  H04W28/12

Abstract: An apparatus and a method for transmitting and/or receiving data in an electronic device are provided. According to an embodiment, an electronic device includes a communication interface and a processor. When the electronic device outputs content, the processor can transmit the content to an external electronic device using the communication interface, detect a state of the electronic device in relation to the output, select substitute content for the content at least based on the detection, determine a schedule corresponding to the substitute content, and transmit the substitute content to the external electronic device based on the schedule.

公开(公告)号：US20210167977A1

公开(公告)日：2021-06-03

申请号：US17176298

申请日：2021-02-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bu-Seop JUNG ,  Bum-Jib KIM ,  Jung-Hun LEE ,  Hye-Jung BANG ,  Soon-Ho LEE ,  Young-Kow LEE ,  Ki-Yeong JEONG ,  Nam-Ju CHO ,  Doo-Suk KANG ,  Hyuk KANG ,  Bo-Kun CHOI

IPC: H04L12/12 ,  G06F1/26 ,  G06F1/32 ,  H04W52/02 ,  G06F1/3209 ,  H04W52/28 ,  H04N21/6377 ,  H04N21/443 ,  H04L12/64 ,  H04N21/4363 ,  G06F15/17 ,  G06F1/3234 ,  H04W84/12 ,  H04W88/06

Abstract: An electronic device and a power control method of an electronic device are provided. The electronic device may include: a communication circuit including a first circuit configured to perform first communication and a second circuit configured to perform second communication; a processor electrically connected to the communication circuit; and a memory electrically connected to the processor, wherein, the memory stores instructions that, when executed, cause the processor to perform operations comprising: controlling the first circuit to operate according to a first power control mode associated with the first communication, and controlling the second circuit to operate according to a second power control mode associated with the second communication when the first communication and the second communication are concurrently performed through the first circuit and the second circuit; identifying a first sleep period during which the first circuit operates in a sleep mode according to the first power control mode, and a second sleep period during which the second circuit operates in the sleep mode according to the second power control mode; and controlling the communication circuit to operate in a deep sleep mode in which the communication circuit operates with power that is less than or equal to a predetermined power in a period where the first sleep period and the second sleep period coincide.

公开(公告)号：US20180041349A1

公开(公告)日：2018-02-08

申请号：US15619888

申请日：2017-06-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bu-Seop JUNG ,  Bum-Jib KIM ,  Jung-Hun LEE ,  Hye-Jung BANG ,  Soon-Ho LEE ,  Young-Kow LEE ,  Ki-Yeong JEONG ,  Nam-Ju CHO ,  Doo-Suk KANG ,  Hyuk KANG ,  Bo-Kun CHOI

IPC: H04L12/12 ,  G06F15/17 ,  H04N21/6377 ,  H04L12/64 ,  G06F1/26

CPC classification number: H04L12/12 ,  G06F1/26 ,  G06F1/32 ,  G06F1/3209 ,  G06F1/325 ,  G06F15/17 ,  H04L12/64 ,  H04N21/43637 ,  H04N21/4436 ,  H04N21/6377 ,  H04W52/0248 ,  H04W52/0251 ,  H04W52/0274 ,  H04W52/287 ,  H04W84/12 ,  H04W88/06 ,  Y02D70/00 ,  Y02D70/10 ,  Y02D70/1242 ,  Y02D70/1262 ,  Y02D70/14 ,  Y02D70/142 ,  Y02D70/144 ,  Y02D70/162 ,  Y02D70/164 ,  Y02D70/166 ,  Y02D70/168 ,  Y02D70/20 ,  Y02D70/22 ,  Y02D70/26

Abstract: An electronic device and a power control method of an electronic device are provided. The electronic device may include: a communication circuit including a first circuit configured to perform first communication and a second circuit configured to perform second communication; a processor electrically connected to the communication circuit; and a memory electrically connected to the processor, wherein, the memory stores instructions that, when executed, cause the processor to perform operations comprising: controlling the first circuit to operate according to a first power control mode associated with the first communication, and controlling the second circuit to operate according to a second power control mode associated with the second communication when the first communication and the second communication are concurrently performed through the first circuit and the second circuit; identifying a first sleep period during which the first circuit operates in a sleep mode according to the first power control mode, and a second sleep period during which the second circuit operates in the sleep mode according to the second power control mode; and controlling the communication circuit to operate in a deep sleep mode in which the communication circuit operates with power that is less than or equal to a predetermined power in a period where the first sleep period and the second sleep period coincide.