公开(公告)号：US20190163623A1

公开(公告)日：2019-05-30

申请号：US16199304

申请日：2018-11-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DUCK-HO BAE

IPC: G06F12/02 ,  G06F12/1009 ,  G06F3/06 ,  G11C16/10

Abstract: A memory system includes a plurality of memory chips, including a first memory chip and a second memory chip, and a controller. The controller includes a first central processing unit (CPU) to process a request received from a host, and a plurality of second CPUs to respectively control operations of the plurality of memory chips through a plurality of channels. An importance table is stored in the controller and includes information about a data programming method for data stored in the memory system, the information about the data programming method corresponding to importance information of the data. The second CPUs are configured to program at least some of the data in both the first memory chip and the second memory chip, based on the importance table, so that at least some of the data is stored in both the first memory chip and the second memory chip as same data.

公开(公告)号：US20210133096A1

公开(公告)日：2021-05-06

申请号：US17144713

申请日：2021-01-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DUCK-HO BAE

IPC: G06F12/02 ,  G06F12/1009 ,  G06F3/06 ,  G11C16/10

Abstract: A memory system includes a plurality of memory chips, including a first memory chip and a second memory chip, and a controller. The controller includes a first central processing unit (CPU) to process a request received from a host, and a plurality of second CPUs to respectively control operations of the plurality of memory chips through a plurality of channels. An importance table is stored in the controller and includes information about a data programming method for data stored in the memory system, the information about the data programming method corresponding to importance information of the data. The second CPUs are configured to program at least some of the data in both the first memory chip and the second memory chip, based on the importance table, so that at least some of the data is stored in both the first memory chip and the second memory chip as same data.

公开(公告)号：US20200042459A1

公开(公告)日：2020-02-06

申请号：US16291402

申请日：2019-03-04

Applicant: SAMSUNG ELECTRONICS CO., LTD

Inventor： DUCK-HO BAE ,  DONG-UK KIM ,  HYUNG-WOO RYU ,  KWANG-HYUN LA ,  JOO-YOUNG HWANG ,  YOU-RA CHOI

IPC: G06F12/1009

Abstract: An electronic system includes a host device and a storage device including a first memory device of a volatile type and a second memory device of a nonvolatile type. The first memory device is accessed by the host device through a memory-mapped input-output interface and the second memory device is accessed by the host device through a block accessible interface. The storage device provides a virtual memory region to the host device such that a host-dedicated memory region having a first size included in the first memory device is mapped to the virtual memory region having a second size larger than the first size.