公开(公告)号：US20170270885A1

公开(公告)日：2017-09-21

申请号：US15613698

申请日：2017-06-05

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JAE-HOON LEE ,  SEUNG-HWAN MOON ,  YONG-SOON LEE ,  YOUNG-SU KIM ,  CHANG-HO LEE ,  WHEE-WON LEE ,  JUN-YONG SONG ,  YU-HAN BAE

IPC: G09G3/36 ,  G11C19/28

CPC classification number: G09G3/3677 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2330/021 ,  G11C19/28

Abstract: A display panel includes an amorphous silicon gate driver in which a lower voltage than the gate-off voltage output from the gate driver is applied to an adjacent stage as a low voltage transmission signal.

公开(公告)号：US20200258466A1

公开(公告)日：2020-08-13

申请号：US16860164

申请日：2020-04-28

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JAE-HOON LEE ,  SEUNG-HWAN MOON ,  YONG-SOON LEE ,  YOUNG-SU KIM ,  CHANG-HO LEE ,  WHEE-WON LEE ,  JUN-YONG SONG ,  YU-HAN BAE

IPC: G09G3/36 ,  G11C19/28

Abstract: A display panel includes an amorphous silicon gate driver in which a lower voltage than the gate-off voltage output from the gate driver is applied to an adjacent stage as a low voltage transmission signal.

公开(公告)号：US20250140217A1

公开(公告)日：2025-05-01

申请号：US19008857

申请日：2025-01-03

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JAE-HOON LEE ,  SEUNG-HWAN MOON ,  YONG-SOON LEE ,  YOUNG-SU KIM ,  CHANG-HO LEE ,  WHEE-WON LEE ,  JUN-YONG SONG ,  YU-HAN BAE

IPC: G09G3/36 ,  G11C19/28

Abstract: A display panel includes an amorphous silicon gate driver in which a lower voltage than the gate-off voltage output from the gate driver is applied to an adjacent stage as a low voltage transmission signal.

公开(公告)号：US20240144893A1

公开(公告)日：2024-05-02

申请号：US18408648

申请日：2024-01-10

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JAE-HOON LEE ,  SEUNG-HWAN MOON ,  YONG-SOON LEE ,  YOUNG-SU KIM ,  CHANG-HO LEE ,  WHEE-WON LEE ,  JUN-YONG SONG ,  YU-HAN BAE

IPC: G09G3/36 ,  G11C19/28

CPC classification number: G09G3/3677 ,  G11C19/28 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2330/021

Abstract: A display panel includes an amorphous silicon gate driver in which a lower voltage than the gate-off voltage output from the gate driver is applied to an adjacent stage as a low voltage transmission signal.