公开(公告)号：US20200371578A1

公开(公告)日：2020-11-26

申请号：US15931307

申请日：2020-05-13

Applicant: QUALCOMM Incorporated

Inventor： Dilip Venkateswaran Murali ,  Murali Krishna ,  Thiyagarajan Selvam ,  Sujeev Dias ,  Tony Truong

IPC: G06F1/3234 ,  G06F13/42

Abstract: Systems and methods for power management for Peripheral Component Interconnect express (PCIE) devices allow PCIE termini to enter advanced low-power states while a PCIE link is idle. These advanced low-power states may include scaling a clock frequency up through a complete shutdown of power rails and clocks within the PCIE terminus. Additionally, use of a wakeup signal such as a clock request (CLKREQ or CLKREQ#) signal may allow the terminus to wake relatively quickly and resume operation so as to avoid degradation of the user experience or loss of data.

公开(公告)号：US11815976B2

公开(公告)日：2023-11-14

申请号：US15931409

申请日：2020-05-13

Applicant: QUALCOMM Incorporated

Inventor： Thiyagarajan Selvam ,  Dilip Venkateswaran Murali ,  Murali Krishna ,  Sujeev Dias ,  Tony Truong

IPC: G06F1/3234 ,  G06F13/42

CPC classification number: G06F1/3253 ,  G06F13/4282 ,  G06F2213/0026

Abstract: A system includes an interface circuit configured to provide an interface with a link, and a controller. The controller is configured to receive one or more bandwidth requests from one or more clients, and determine at least one of a link speed and a link width for the link based on the one or more bandwidth requests.

公开(公告)号：US11073894B2

公开(公告)日：2021-07-27

申请号：US15931307

申请日：2020-05-13

Applicant: QUALCOMM Incorporated

Inventor： Dilip Venkateswaran Murali ,  Murali Krishna ,  Thiyagarajan Selvam ,  Sujeev Dias ,  Tony Truong

IPC: G06F1/3234 ,  G06F13/42

Abstract: Systems and methods for power management for Peripheral Component Interconnect express (PCIE) devices allow PCIE termini to enter advanced low-power states while a PCIE link is idle. These advanced low-power states may include scaling a clock frequency up through a complete shutdown of power rails and clocks within the PCIE terminus. Additionally, use of a wakeup signal such as a clock request (CLKREQ or CLKREQ #) signal may allow the terminus to wake relatively quickly and resume operation so as to avoid degradation of the user experience or loss of data.