公开(公告)号：US20240411463A1

公开(公告)日：2024-12-12

申请号：US18331612

申请日：2023-06-08

Applicant: QUALCOMM Incorporated

Inventor： Chintalapati Bharath Sai Varma ,  Santhosh Reddy Akavaram ,  Prakhar Srivastava ,  Rajendra Varma Pusapati ,  Sai Naresh Gajapaka

IPC: G06F3/06

Abstract: This disclosure provides systems, methods, and devices for memory systems that support queued current level adjustment in a flash memory system. In a first aspect, a method of accessing data in a flash memory system includes receiving, at a memory controller of a memory system from a host device, a first request to adjust a current level of a memory module of the memory system, storing, by the memory controller, an indication of the first request in a register associated with the memory controller, and transmitting, to the host device, an indication that the first request is pending. Other aspects and features are also claimed and described.

公开(公告)号：US12265729B1

公开(公告)日：2025-04-01

申请号：US18413889

申请日：2024-01-16

Applicant: QUALCOMM Incorporated

Inventor： Vamsi Krishna Sambangi ,  Sai Naresh Gajapaka ,  Venkatesha M Iyengar ,  Madhu Yashwanth Boenapalli ,  Sai Praneeth Sreeram

IPC: G06F12/00 ,  G06F3/06

Abstract: This disclosure provides systems, methods, and devices for memory systems that support enhanced write buffer flush schemes. In a first aspect, a method performed by a memory controller includes detecting, by the memory controller, a flush operation associated with a write buffer. The method also includes detecting, by the memory controller during the flush operation, a command for placement into a command queue. The method further include prioritizing, by the memory controller, the flush operation to by placing the command in a wait queue and maintaining the flush operation. Other aspects and features are also claimed and described.