公开(公告)号：US20190294443A1

公开(公告)日：2019-09-26

申请号：US15926429

申请日：2018-03-20

Applicant: QUALCOMM Incorporated

Inventor： Sandeep Suresh Navada ,  Michael Scott McIlvaine ,  Rodney Wayne Smith ,  Robert Douglas Clancy ,  Yusuf Cagatay Tekmen ,  Niket Choudhary ,  Daren Eugene Streett ,  Richard Doing ,  Ankita Upreti

IPC: G06F9/38

Abstract: Providing early pipeline optimization of conditional instructions in processor-based systems is disclosed. In one aspect, an instruction pipeline of a processor-based system detects a mispredicted branch (i.e., following a misprediction of a condition associated with a speculatively executed conditional branch instruction), and records a current state of one or more condition flags as a condition flags snapshot. After a pipeline flush is initiated and a corrected fetch path is restarted, an instruction decode stage of the instruction pipeline uses the condition flags snapshot to apply optimizations to conditional instructions detected within the corrected fetch path. According to some aspects, the condition flags snapshot is subsequently invalidated upon encountering a condition-flag-writing instruction within the corrected fetch path. In this manner, the condition flags snapshot enables non-speculative (with respect to the corrected fetch path) resolution of conditional instructions earlier within the instruction pipeline, thus conserving system resources and improving processor performance.