公开(公告)号：US20150310990A1

公开(公告)日：2015-10-29

申请号：US14261373

申请日：2014-04-24

Applicant: Qualcomm Incorporated

Inventor： Lalan Jee Mishra ,  Shree Krishna Pandey ,  Nazanin Darbanian ,  John David Eaton

IPC: H01G4/30

CPC classification number: H01G4/30 ,  H01G4/012 ,  H01G4/12 ,  H01G4/232

Abstract: Aspects of a method of manufacturing a capacitor are provided. The method includes layering a plurality of dielectric plates. The plurality of dielectric plates includes a first dielectric plate having a first conductive region and a second conductive region on a surface of the first dielectric plate. The method further includes forming an inner electrode through an axis of the layered plurality of dielectric plates. The inner electrode electrically couples to the first conductive region on the surface of the first dielectric plate. The method further includes forming an outer electrode, where the outer electrode electrically couples to the second conductive region on the surface of the first dielectric plate.

Abstract translation: 提供制造电容器的方法的方面。 该方法包括层叠多个电介质板。 多个电介质板包括在第一电介质板的表面上具有第一导电区域和第二导电区域的第一电介质板。 该方法还包括通过层叠的多个电介质板的轴线形成内部电极。 内部电极电耦合到第一电介质板的表面上的第一导电区域。 该方法还包括形成外部电极，其中外部电极电耦合到第一电介质板的表面上的第二导电区域。

公开(公告)号：US20150255216A1

公开(公告)日：2015-09-10

申请号：US14201469

申请日：2014-03-07

Applicant: QUALCOMM Incorporated

Inventor： Lalan Jee Mishra ,  Shree Krishna Pandey ,  Irfan Khan ,  Nazanin Darbanian ,  John David Eaton

IPC: H01G4/30 ,  H05K1/18 ,  H01L49/02

CPC classification number: H01G4/30 ,  H01G2/06 ,  H01G4/242 ,  H01G4/35 ,  H05K1/0231 ,  H05K1/182 ,  H05K2201/09345 ,  H05K2201/10015 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10636 ,  H05K2201/10643 ,  Y02P70/611

Abstract: A capacitor with low equivalent series inductance includes multiple electrode layers arranged in parallel with alternating ones of the electrode layers connected together to form the two electrodes of the capacitor. A first set of the electrode layers are connected by an outer wall. A second set of the electrode layers are connected by a central post. Terminals on the capacitor can be spaced on a surface so that signals can be conveniently routed when the capacitor is mounted on or in a printed circuit board or integrated circuit package. Terminals can be included on opposing surfaces of the capacitors to provide for stacking. Additionally, one of the terminals substantially surrounds the other terminal and can provide electromagnetic shielding.

Abstract translation: 具有低等效串联电感的电容器包括与连接在一起的交替的电极层并联布置的多个电极层，以形成电容器的两个电极。 第一组电极层通过外壁连接。 第二组电极层通过中心柱连接。 电容器上的端子可以在表面上间隔开，使得当电容器安装在印刷电路板或集成电路封装上时可以方便地布线信号。 端子可以包括在电容器的相对表面上以提供堆叠。 此外，其中一个端子基本上围绕另一个端子并且可以提供电磁屏蔽。