公开(公告)号：US20220108918A1

公开(公告)日：2022-04-07

申请号：US17064471

申请日：2020-10-06

Applicant: QUALCOMM Incorporated

Inventor： Kuiwon KANG ,  Joan Rey Villarba BUOT ,  Jialing TONG

IPC: H01L21/768 ,  H01L21/3213 ,  C25D3/56 ,  H01L23/528 ,  H01L23/00

Abstract: A method of forming electrical interconnections comprises patterning a trace on a dielectric layer and then masking the dielectric layer for plating. The dielectric layer is plated to form electrical interconnections. After plating the masking is removed. A laser etch back of the trace is performed after removing the masking, in which the laser etch back removes tails on the trace. After the laser etch back, the patterned traces and the dielectric layer are cleaned.