Self-adaptive Cache Architecture Based on Run-time Hardware Counters and Offline Profiling of Applications
    1.
    发明申请
    Self-adaptive Cache Architecture Based on Run-time Hardware Counters and Offline Profiling of Applications 审中-公开
    基于运行时硬件计数器和应用程序脱机分析的自适应缓存体系结构

    公开(公告)号:US20170017576A1

    公开(公告)日:2017-01-19

    申请号:US14801329

    申请日:2015-07-16

    Abstract: Aspects include computing devices, systems, and methods for implementing generating a cache memory configuration. A server may apply machine learning to context data. The server may determine a cache memory configuration relating to the context data for a cache memory of a computing device and predict execution of an application on the computing device. Aspects include computing devices, systems, and methods for implementing configuring a cache memory of the computing device. The computing device may classify a plurality of cache memory configurations, related to a predicted application execution, based on at least a hardware data threshold and a first hardware data. The computing device may select a first cache memory configuration from the plurality of cache memory configurations in response to the first cache memory configuration being classified for the first hardware data, and configuring the cache memory at runtime based on the first cache memory configuration.

    Abstract translation: 方面包括用于实现生成高速缓冲存储器配置的计算设备,系统和方法。 服务器可以将机器学习应用于上下文数据。 服务器可以确定与计算设备的高速缓冲存储器的上下文数据相关的高速缓存存储器配置,并且预测计算设备上的应用的执行。 方面包括用于实现配置计算设备的高速缓冲存储器的计算设备,系统和方法。 计算设备可以至少基于硬件数据阈值和第一硬件数据来分类与预测的应用执行相关的多个高速缓存存储器配置。 响应于第一高速缓存存储器配置被分类为第一硬件数据,以及基于第一高速缓冲存储器配置在运行时配置高速缓冲存储器,计算设备可以从多个高速缓存存储器配置中选择第一高速缓存存储器配置。

Patent Agency Ranking