公开(公告)号：US08242999B2

公开(公告)日：2012-08-14

申请号：US12345779

申请日：2008-12-30

申请人： Po-Chih Lin ,  Cheng-Che Ho

发明人： Po-Chih Lin ,  Cheng-Che Ho

IPC分类号： G09G3/36

CPC分类号： G09G3/3611 ,  G09G2310/06 ,  G09G2320/0209

摘要： A driving method for generating activating signals that serve to activate scan lines of a display panel includes generating the activating signals based on a plurality of recorded pulse duration information to thereby permit a time point at which a pulse duration of a preceding one of the activating signals in a consecutive pair ends occurs prior to a time point at which a pulse duration of a succeeding one of the activating signals in the consecutive pair starts. A driving device that performs the driving method is also disclosed. A method for adjusting pulse durations of the activating signals is further disclosed.

摘要翻译： 用于产生用于激活显示面板的扫描线的激活信号的驱动方法包括基于多个记录的脉冲持续时间信息产生激活信号，从而允许激活信号之前的一个激活信号的脉冲持续时间 在连续的对中，在连续对中的后续激活信号的脉冲持续时间开始的时间点之前发生。 还公开了执行驱动方法的驱动装置。 还公开了一种用于调整激活信号的脉冲持续时间的方法。

公开(公告)号：US20100026668A1

公开(公告)日：2010-02-04

申请号：US12345779

申请日：2008-12-30

申请人： Po-Chih Lin ,  Cheng-Che Ho

发明人： Po-Chih Lin ,  Cheng-Che Ho

IPC分类号： G09G5/00

CPC分类号： G09G3/3611 ,  G09G2310/06 ,  G09G2320/0209

摘要： A driving method for generating activating signals that serve to activate scan lines of a display panel includes generating the activating signals based on a plurality of recorded pulse duration information to thereby permit a time point at which a pulse duration of a preceding one of the activating signals in a consecutive pair ends occurs prior to a time point at which a pulse duration of a succeeding one of the activating signals in the consecutive pair starts. A driving device that performs the driving method is also disclosed. A method for adjusting pulse durations of the activating signals is further disclosed.

摘要翻译： 用于产生用于激活显示面板的扫描线的激活信号的驱动方法包括基于多个记录的脉冲持续时间信息产生激活信号，从而允许激活信号之前的一个激活信号的脉冲持续时间 在连续的对中，在连续对中的后续激活信号的脉冲持续时间开始的时间点之前发生。 还公开了执行驱动方法的驱动装置。 还公开了一种用于调整激活信号的脉冲持续时间的方法。

公开(公告)号：US20100026617A1

公开(公告)日：2010-02-04

申请号：US12338076

申请日：2008-12-18

申请人： Chun-Neng Su ,  Hung-Chi Weng ,  Cheng-Che Ho

发明人： Chun-Neng Su ,  Hung-Chi Weng ,  Cheng-Che Ho

IPC分类号： G09G3/36

CPC分类号： G09G3/3622 ,  G09G2310/0224 ,  G09G2310/0229 ,  G09G2320/0209 ,  G09G2330/021

摘要： A method for activating scan lines of a passive matrix liquid crystal display (LCD) panel includes activating the scan lines of the passive matrix LCD panel in a selected one of an interlaced scanning mode and a progressive scanning mode that is selected based on a select signal. A device that performs the method is also disclosed.

摘要翻译： 一种用于激活无源矩阵液晶显示器（LCD）面板的扫描线的方法包括以选择的一种隔行扫描模式和逐行扫描模式激活无源矩阵LCD面板的扫描线，该扫描线基于选择信号 。 还公开了执行该方法的设备。

公开(公告)号：US20080183784A1

公开(公告)日：2008-07-31

申请号：US11699971

申请日：2007-01-31

申请人： Jin-Fa Lin ,  Yin-Tsung Hwang ,  Ming-Hwa Sheu ,  Cheng-Che Ho

发明人： Jin-Fa Lin ,  Yin-Tsung Hwang ,  Ming-Hwa Sheu ,  Cheng-Che Ho

IPC分类号： G06F7/38

CPC分类号： G06F7/501

摘要： In a full-adder of complementary carry logic voltage compensation, two input terminals of a first multiplexer are connected to a carry input and a carry inverted phase input respectively; an add signal is connected to a select signal; an input terminal of a first inverter is connected to an output signal of the first multiplexer. Two input terminals of a second multiplexer output an addend and a summand; an output signal of the first inverter is selected; an output terminal of the second multiplexer produces a carry signal; an input terminal of the second inverter is connected to an output signal of the second multiplexer for producing a carry inverted phase signal; two input terminals of a third multiplexer input the summand and carry inverted phase signal; an output signal of the first inverter is a select signal; and an output terminal of the third multiplexer produces a sum signal.

摘要翻译： 在互补进位逻辑电压补偿的全加器中，第一多路复用器的两个输入端分别连接到进位输入和进位反相输入端; 加法信号连接到选择信号; 第一反相器的输入端连接到第一多路复用器的输出信号。 第二多路复用器的两个输入端输出加法和加法器; 选择第一反相器的输出信号; 第二多路复用器的输出端产生进位信号; 第二反相器的输入端子连接到第二多路复用器的输出信号，用于产生进位反相信号; 第三多路复用器的两个输入端输入加法器并传送反相信号; 第一反相器的输出信号是选择信号; 并且第三多路复用器的输出端产生和信号。

公开(公告)号：US07508233B2

公开(公告)日：2009-03-24

申请号：US11699971

申请日：2007-01-31

申请人： Jin-Fa Lin ,  Yin-Tsung Hwang ,  Ming-Hwa Sheu ,  Cheng-Che Ho

发明人： Jin-Fa Lin ,  Yin-Tsung Hwang ,  Ming-Hwa Sheu ,  Cheng-Che Ho

IPC分类号： H03K19/173 ,  G06F7/38

CPC分类号： G06F7/501

摘要： In a full-adder of complementary carry logic voltage compensation, two input terminals of a first multiplexer are connected to a carry input and a carry inverted phase input respectively; an add signal is connected to a select signal; an input terminal of a first inverter is connected to an output signal of the first multiplexer. Two input terminals of a second multiplexer output an addend and a summand; an output signal of the first inverter is selected; an output terminal of the second multiplexer produces a carry signal; an input terminal of the second inverter is connected to an output signal of the second multiplexer for producing a carry inverted phase signal; two input terminals of a third multiplexer input the summand and carry inverted phase signal; an output signal of the first inverter is a select signal; and an output terminal of the third multiplexer produces a sum signal.

摘要翻译： 在互补进位逻辑电压补偿的全加器中，第一多路复用器的两个输入端分别连接到进位输入和进位反相输入端; 加法信号连接到选择信号; 第一反相器的输入端连接到第一多路复用器的输出信号。 第二多路复用器的两个输入端输出加法和加法器; 选择第一反相器的输出信号; 第二多路复用器的输出端产生进位信号; 第二反相器的输入端子连接到第二多路复用器的输出信号，用于产生进位反相信号; 第三多路复用器的两个输入端输入加法器并传送反相信号; 第一反相器的输出信号是选择信号; 并且第三多路复用器的输出端产生和信号。