公开(公告)号：US20220334920A1

公开(公告)日：2022-10-20

申请号：US17306896

申请日：2021-05-03

Applicant: PHISON ELECTRONICS CORP.

Inventor： Hsiao-Chi Ho

IPC: G06F11/10 ,  G06F11/07 ,  G06F11/16 ,  G06F11/30 ,  G06F12/02

Abstract: A method for managing a host memory buffer, a memory storage apparatus, and a memory control circuit unit are provided. The method includes: detecting whether a system abnormality occurs; copying a first command and first data corresponding to the first command stored in a data buffer of a host system to the memory storage apparatus in response to determining that the system abnormality occurs; executing an initial operation after copying the first command and the first data, wherein the initial operation initializes a part of a hardware circuit in the memory storage apparatus and does not initialize another part of the hardware circuit in the memory storage apparatus; and re-executing the first command stored in the memory storage apparatus after initializing the part of the hardware circuit.

公开(公告)号：US11614997B2

公开(公告)日：2023-03-28

申请号：US17306896

申请日：2021-05-03

Applicant: PHISON ELECTRONICS CORP.

Inventor： Hsiao-Chi Ho

IPC: G06F11/14 ,  G06F11/10 ,  G06F11/07 ,  G06F11/16 ,  G06F12/0804 ,  G06F12/0866 ,  G06F3/06

Abstract: A method for managing a host memory buffer, a memory storage apparatus, and a memory control circuit unit are provided. The method includes: detecting whether a system abnormality occurs; copying a first command and first data corresponding to the first command stored in a data buffer of a host system to the memory storage apparatus in response to determining that the system abnormality occurs; executing an initial operation after copying the first command and the first data, wherein the initial operation initializes a part of a hardware circuit in the memory storage apparatus and does not initialize another part of the hardware circuit in the memory storage apparatus; and re-executing the first command stored in the memory storage apparatus after initializing the part of the hardware circuit.

公开(公告)号：US20190286351A1

公开(公告)日：2019-09-19

申请号：US15978198

申请日：2018-05-14

Applicant: PHISON ELECTRONICS CORP.

Inventor： Hsiao-Chi Ho ,  Cheng-Nan Wu ,  Chien-Hua Chu

IPC: G06F3/06 ,  G06F12/02

Abstract: A method for configuring host memory buffer, a memory storage apparatus and a memory control circuit unit are provided. The method includes: loading an initial program stored in an option ROM of a memory storage apparatus to a buffer memory of a host system; executing the initial program to configure continuous physical addresses in the buffer memory as a host memory buffer of the memory storage apparatus and setting a signature at the continuous physical addresses and storing the signature. The method further includes: re-establishing a link with the continuous physical addresses when receiving a reset command corresponding to a suspend-to-RAM mode and determining whether a signature set at the continuous physical addresses is the same as the stored signature; and resuming to use the continuous physical addresses as the host memory buffer of the memory storage apparatus if the signature is the same as the stored signature.